Abstract

Cascadable optically nonlinear arrays of logic devices interconnected with space invariant optical components are proposed for the core memory of a digital computer. Access time to any portion of the memory is O(log₂N) gate delays for logic devices with fan-in and fan-out of two, where N is the size of the memory in bits. The cost of the design in switching components is near minimal for a random access memory (RAM) between one and two components per stored bit of information depending on the size of the memory. The design is extensible to very large RAMs, although parallel access memory is preferred to a RAM configuration for large memories due to the parallel access capability of the optical design.

© 1989 Optical Society of America

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