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Optica Publishing Group
  • Journal of Lightwave Technology
  • Vol. 27,
  • Issue 21,
  • pp. 4634-4641
  • (2009)

Multidimensional and Reconfigurable Optical Interconnects for High-Performance Computing (HPC) Systems

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Abstract

The increasing demand for higher communication bandwidth, reduced power consumption, and increased reliability combined with fundamental electrical signalling limitations is leading the drive for optics as an interconnect technology of choice for high-performance computing (HPC) systems. However, failure in any optical link can completely disrupt communication by isolating processing nodes in HPC systems. Moreover, while static allocation of wavelengths (channels) provides every node with equal opportunity for communication, it can also lead to network congestion for nonuniform traffic patterns. In this paper, we propose a multidimensional optoelectronic architecture, called ${nD}$-reconfigurable, all-photonic interconnect for distributed and parallel systems (${n}$dimensional-RAPID) where ${n}$ can be 1, 2, or 3. ${nD}$-RAPID exploits optical architecture and technology design space that simultaneously tackles both fault-tolerance and dynamic bandwidth reallocation (DBR) of system architecture. Fault-tolerance in ${nD}$-RAPID is enabled through a multidimensional architecture. DBR is implemented by the row–column switching matrix using silicon-on-insulator (SOI)-based microring resonators that adapts to changes in communication patterns at runtime. Simulation results indicate that ${nD}$-RAPID outperformed other electrical networks for most traffic patterns. Results on DBR show that the proposed row–column switch organization significantly improves throughput and latency with a slight increase in electrical power consumption ($\sim$0.4% for the worst case traffic).

© 2009 IEEE

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