An optical pipelined architecture for a multifunctional binary arithmetic unit is proposed. The approach may eliminate geometrical constraints experienced in conventional implementations, thereby facilitating direct microminiaturization. Issues such as intensity restoration during data flow and fanout are also addressed.
© 1988 Optical Society of America
Original Manuscript: September 18, 1987
Published: November 15, 1988
Partha P. Banerjee and Arif Ghafoor, "Design of a pipelined optical binary processor," Appl. Opt. 27, 4766-4770 (1988)