Optically interconnected processor arrays are compared to conventional fully electronic processor arrays in terms of interconnect density capabilities. A complexity model is introduced that allows the calculation of the array area growth rate as an asymptotic function of the number of processing elements in the array. Lower bounds on the area growth rate of electrically interconnected processor arrays are compared to upper bounds for free-space optically interconnected circuits that employ computer generated holograms. Results indicate that for connection networks such as the hypercube, perfect shuffle and crossbar networks, that have a high minimum bisection width (a measure of the global nature of an interconnect topology) and contain some degree of spatial invariance, optically interconnected circuit area growth rates are below lower bounds on VLSI circuit growth rates.
© 1989 Optical Society of America
Michael R. Feldman, Clark C. Guest, Timothy J. Drabik, and Sadik C. Esener, "Comparison between electrical and free space optical interconnects for fine grain processor arrays based on interconnect density capabilities," Appl. Opt. 28, 3820-3829 (1989)