Abstract

The design of a parallel digital computer architecture, the shared-memory optical/electronic computer (SMOEG), and its associated control algorithms are presented. The design is based on the shared-memory model of computation and incorporates an optical interconnection network as an essential element. The arthitecture consists of a novel passive optical shuffle-exchange network, which is detailed in another paper [Appl. Opt. 33, (1994)], that interconnects electronic processing elements with electronic memory modules and incorporates network control. Improved capability of this optical–electronic multiple-instruction multiple-data (MIMD) architecture over fully electronic implementations stems from the reduced complexity inherent in the optical interconnection network and the resulting memory access capability. In this system the simultaneous development of three main design facets, architecture, hardware, and control algorithms, is crucial in designing an efficient high-performance system.

© 1994 Optical Society of America

Passive optical interconnection network employing a shuffle–exchange topology

Clare Waterson and B. Keith Jenkins
Appl. Opt. 33(8) 1575-1586 (1994)

Optical parallel-access shared memory system: analysis and experimental demonstration

Kuang-Yu J. Li and B. Keith Jenkins
Appl. Opt. 34(2) 358-369 (1995)

Picosecond multistage interconnection network architecture for optical computing

Mohsen Guizani
Appl. Opt. 33(8) 1587-1599 (1994)

Designing massively parallel optical computers: a case study

Aloke Guha and M. W. Derstine
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Parallel architecture for a digital optical computer

Gregor Stucke
Appl. Opt. 28(2) 363-370 (1989)