The technical issues involved in applying vertical-cavity surface-emitting lasers (VCSEL’s) to parallel optical interconnection systems are discussed from the viewpoint of their application to asynchronous transfer mode switching and parallel computer systems. We also discuss approaches to designing a VCSEL array structure for high-speed modulation and the effect of pixel-performance homogeneity on the transmission bandwidth and power consumption. We review monolithic and hybrid integration technologies for VCSEL-based smart-pixel arrays, and we estimate the maximum pixel number and input–output throughput allowed in a chip, considering the power consumption and pixel homogeneity. We show that a one-chip optoelectronic parallel processing system comprising more than 1000 processor elements is possible when smart-pixel arrays are fabricated under the 0.25-μm complementary metal-oxide semiconductor design rule.
© 1998 Optical Society of America
Original Manuscript: April 7, 1997
Revised Manuscript: August 25, 1997
Published: January 10, 1998
Takashi Kurokawa, Shinji Matso, Tatsushi Nakahara, Kota Tateno, Yoshitaka Ohiso, Atsushi Wakatsuki, and Hiroyuki Tsuda, "Design approaches for VCSEL’s and VCSEL-based smart pixels toward parallel optoelectronic processing systems," Appl. Opt. 37, 194-204 (1998)