OSA's Digital Library

Applied Optics

Applied Optics

APPLICATIONS-CENTERED RESEARCH IN OPTICS

  • Vol. 39, Iss. 5 — Feb. 10, 2000
  • pp: 721–732

Field-programmable logic devices with optical input–output

Ted H. Szymanski, Martin Saint-Laurent, Victor Tyan, Albert Au, and Boonchuay Supmonchai  »View Author Affiliations


Applied Optics, Vol. 39, Issue 5, pp. 721-732 (2000)
http://dx.doi.org/10.1364/AO.39.000721


View Full Text Article

Enhanced HTML    Acrobat PDF (7565 KB)





Browse Journals / Lookup Meetings

Browse by Journal and Year


   


Lookup Conference Papers

Close Browse Journals / Lookup Meetings

Article Tools

Share
Citations

Abstract

A field-programmable logic device (FPLD) with optical I/O is described. FPLD’s with optical I/O can have their functionality specified in the field by means of downloading a control-bit stream and can be used in a wide range of applications, such as optical signal processing, optical image processing, and optical interconnects. Our device implements six state-of-the-art dynamically programmable logic arrays (PLA’s) on a 2 mm × 2 mm die. The devices were fabricated through the Lucent Technologies–Advanced Research Projects Agency–Consortium for Optical and Optoelectronic Technologies in Computing (Lucent/ARPA/COOP) workshop by use of 0.5-µm complementary metal-oxide semiconductor–self-electro-optic device technology and were delivered in 1998. All devices are fully functional: The electronic data paths have been verified at 200 MHz, and optical tests are pending. The device has been programmed to implement a two-stage optical switching network with six 4 × 4 crossbar switches, which can realize more than 190 × 106 unique programmable input–output permutations. The same device scaled to a 2 cm × 2 cm substrate could support as many as 4000 optical I/O and 1 Tbit/s of optical I/O bandwidth and offer fully programmable digital functionality with approximately 110,000 programmable logic gates. The proposed optoelectronic FPLD is also ideally suited to realizing dense, statically reconfigurable crossbar switches. We describe an attractive application area for such devices: a rearrangeable three-stage optical switch for a wide-area-network backbone, switching 1000 traffic streams at the OC-48 data rate and supporting several terabits of traffic.

© 2000 Optical Society of America

OCIS Codes
(130.0250) Integrated optics : Optoelectronics
(200.3760) Optics in computing : Logic-based optical processing
(200.4650) Optics in computing : Optical interconnects
(250.3140) Optoelectronics : Integrated optoelectronic circuits

History
Original Manuscript: May 17, 1999
Revised Manuscript: August 26, 1999
Published: February 10, 2000

Citation
Ted H. Szymanski, Martin Saint-Laurent, Victor Tyan, Albert Au, and Boonchuay Supmonchai, "Field-programmable logic devices with optical input–output," Appl. Opt. 39, 721-732 (2000)
http://www.opticsinfobase.org/ao/abstract.cfm?URI=ao-39-5-721


Sort:  Author  |  Year  |  Journal  |  Reset  

References

  1. T. H. Szymanski, H. S. Hinton, “Architecture of a field programmable smart pixel array,” in Optics in Computing (Institute of Physics, Bristol, UK, 1995), pp. 497–500.
  2. S. S. Sherif, T. H. Szymanski, H. S. Hinton, “Design and implementation of a field programmable smart pixel array,” in Proceedings of the 1996 IEEE/LEOS Summer Topical Meeting (Institute of Electrical and Electronics Engineers, New York, 1996), pp. 78–79.
  3. S. S. Sherif, S. K. Griebel, A. Au, D. Hui, T. H. Szymanski, H. S. Hinton, “Field-programmable smart-pixel arrays: design, VLSI implementation, and applications,” Appl. Opt. 38, 838–846 (1999). [CrossRef]
  4. J. Depreitere, H. Neefe, H. van Marck, J. Van Campenhout, R. Baets, B. Dhoedt, H. Thienpont, I. Veretennicoff, “An optoelectronic 3D field programmable gate array,” in Proceedings of the Fourth International Workshop on Field Programmable Logic and Applications (Springer-Verlag, Berlin, 1994), pp. 352–360.
  5. M. Ishikawa, “System architecture for integrating optoelectronic computing,” Optoelectron. Devices Technol. 9, 29–36 (1994).
  6. D. Fey, B. Kasche, C. Burkert, O. Tschäche, “Specifications for a reconfigurable optoelectronic VLSI processor suitable for digital signal processing,” Appl. Opt. 37, 284–295 (1998). [CrossRef]
  7. L. Selavo, S. P. Levitan, D. M. Chiarulli, “An optically reconfigurable field programmable gate array,” in Digest of the Topical Meeting on Optics in Computing (Optical Society of America, Washington, D.C., 1999), pp. 146–148.
  8. J. Mumbru, D. Psaltis, “Optically programmable gate array,” in Digest of the Topical Meeting on Optics on Computing (Optical Society of America, Washington, D.C., 1999), pp. 153–155.
  9. T. H. Szymanski, M. Saint-Laurent, V. Tyan, A. Au, B. Supmonchai, “A field programmable gate array with optical I/O,” in Digest of the Topical Meeting on Optics in Computing (Optical Society of America, Washington, D.C., 1999), pp. 149–152.
  10. M. Leeser, W. Meleis, M. Vai, S. Chiricescu, P. Zavracky, “Rothko: a three-dimensional FPGA,” IEEE Design Test. Comput. 15, 16–22 (1998). [CrossRef]
  11. A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibengath, S. P. Hui, G. J. Zydzik, K. W. Goossen, J. D. Wynn, B. J. Tseng, J. Lopata, J. A. Walker, J. E. Cunningham, L. A. D’Asaro, “Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits,” IEEE Photon. Technol. Lett. 11, 128–130 (1999). [CrossRef]
  12. N. H. E. Weste, K. Eshraghian, Principles of CMOS VLSI Design: A Systems Perspective, 2nd ed. (Addison-Wesley, Reading, Mass., 1993), pp. 250–255.
  13. Altera FPGA Data Book 1996 (Altera Corporation, 2610 Orchard Parkway, San Jose, Calif., 1995).
  14. L-Edit Layout Editor Manual, Version 5 (Tanner Research, Inc., 2650 East Foothill Boulevard, Pasadena, Calif., 1995).
  15. T. H. Szymanski, V. Tyan, “Error and flow control in terabit intelligent optical backplanes,” J. Select. Top. Quantum Electron. 5, 339–352 (1999). [CrossRef]
  16. M. Saint-Laurent, “Software programmable logic array,” Undergraduate honors thesis (Department of Electrical and Computer Engineering, McGill University, Montreal, Quebec, Canada, 1997).
  17. E. Karali, Digital Design Principles and Computer Architecture (Prentice-Hall, New York, 1997).
  18. T. K. Woodward, A. V. Krishnamoorthy, A. L. Lentine, K. W. Goossen, J. A. Walker, J. E. Cunningham, W. Y. Jan, L. A. D’Asaro, L. M. F. Chirovsky, S. Hui, B. Tseng, D. Kossives, D. Dahringer, R. E. Leibenguth, “1 Gb/s two-beam transimpedance smart-pixel optical receiver mode from hybrid GaAs MQW modulators bonded to 0.8-µm silicon CMOS,” IEEE Photon. Technol. Lett. 8, 422–424 (1996). [CrossRef]
  19. T. M. Slagle, K. H. Wagner, “Optical smart-pixel-based Clos crossbar switch,” Appl. Opt. 36, 8336–8351 (1997). [CrossRef]
  20. J. Depreitere, H. van Marck, J. Van Campenhout, “A quantitative analysis of the benefits of the use of area I/O pads in FPGA’s,” Microprocess. Microsys. 21, 89–97 (1997). [CrossRef]

Cited By

Alert me when this paper is cited

OSA is able to provide readers links to articles that cite this paper by participating in CrossRef's Cited-By Linking service. CrossRef includes content from more than 3000 publishers and societies. In addition to listing OSA journal articles that cite this paper, citing articles from other participating publishers will also be listed.


« Previous Article  |  Next Article »

OSA is a member of CrossRef.

CrossCheck Deposited