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Applied Optics

Applied Optics


  • Editor: Joseph N. Mait
  • Vol. 49, Iss. 10 — Apr. 1, 2010
  • pp: B83–B91

Acceleration of spiking neural network based pattern recognition on NVIDIA graphics processors

Bing Han and Tarek M. Taha  »View Author Affiliations

Applied Optics, Vol. 49, Issue 10, pp. B83-B91 (2010)

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There is currently a strong push in the research community to develop biological scale implementations of neuron based vision models. Systems at this scale are computationally demanding and generally utilize more accurate neuron models, such as the Izhikevich and the Hodgkin–Huxley models, in favor of the more popular integrate and fire model. We examine the feasibility of using graphics processing units (GPUs) to accelerate a spiking neural network based character recognition network to enable such large scale systems. Two versions of the network utilizing the Izhikevich and Hodgkin–Huxley models are implemented. Three NVIDIA general-purpose (GP) GPU platforms are examined, including the GeForce 9800 GX2, the Tesla C1060, and the Tesla S1070. Our results show that the GPGPUs can provide significant speedup over conventional processors. In particular, the fastest GPGPU utilized, the Tesla S1070, provided a speedup of 5.6 and 84.4 over highly optimized implementations on the fastest central processing unit (CPU) tested, a quadcore 2.67 GHz Xeon processor, for the Izhikevich and the Hodgkin–Huxley models, respectively. The CPU implementation utilized all four cores and the vector data parallelism offered by the processor. The results indicate that GPUs are well suited for this application domain.

© 2010 Optical Society of America

OCIS Codes
(100.5010) Image processing : Pattern recognition
(100.4996) Image processing : Pattern recognition, neural networks

Original Manuscript: November 3, 2009
Revised Manuscript: February 8, 2010
Manuscript Accepted: February 26, 2010
Published: March 17, 2010

Virtual Issues
Vol. 5, Iss. 8 Virtual Journal for Biomedical Optics

Bing Han and Tarek M. Taha, "Acceleration of spiking neural network based pattern recognition on NVIDIA graphics processors," Appl. Opt. 49, B83-B91 (2010)

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  1. E. Izhikevich, “Which model to use for cortical spiking neurons?,” IEEE Trans. Neural Networks 15, 1063-1070 (2004). [CrossRef]
  2. R. Ananthanarayanan and D. Modha, “Anatomy of a cortical simulator,” in Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis,” (IEEE, 2007). [PubMed]
  3. H. Markram, “The blue brain project,” Nat. Rev. Neurosci. 7, 153-160 (2006). [CrossRef] [PubMed]
  4. A. Delorme and S. J. Thorpe, “SpikeNET: an event-driven simulation package for modelling large networks of spiking neurons,” Network Comput. Neural Syst. 14, 613-627 (Nov. 2003). [CrossRef]
  5. Y. Dan and M. Poo, “Spike time dependent plasticity of neural circuits,” Neuron , 44, 23-30 (2004). [CrossRef] [PubMed]
  6. M. A. Bhuiyan, R. Jalasutram, and T. M. Taha, “Character recognition with two spiking neural network models on multicore architectures,” in IEEE Symposium on Computational Intelligence for Multimedia Signal and Vision Processing (IEEE, 2009). [CrossRef]
  7. A. L. Hodgkin and A. F. Huxley, “A quantitative description of membrane current and application to conduction and excitation in nerve,” J. Physiol. 117, 500-544 (1952). [PubMed]
  8. E. M. Izhikevich, “Simple Model of Spiking Neurons,” IEEE Trans. Neural Networks 14, 1569-1572 (2003). [CrossRef]
  9. GeForce 9800 GX2 Specifications, http://www.nvidia.com/object/product_geforce_9800_gx2_us.html
  10. Tesla C1060 Specifications, http://www.nvidia.com/object/product_tesla_c1060_us.html
  11. C. Johansson and A. Lansner, “Towards cortex sized artificial neural systems,” Neural Networks 20, 48-61 (2007). [CrossRef]
  12. A. R. Baig, “Spatial-temporal artificial neurons applied to online cursive handwritten character recognition,” in European Symposium on Artificial Neural Networks (d-side, 2004), pp. 561-566.
  13. A. Gupta and L. Long, “Character recognition using spiking neural networks,” in Proceedings of the International Joint Conference on Neural Networks (IEEE, 2007). [CrossRef]
  14. C. Panchev and S. Wermter, “Temporal sequence detection with spiking neurons: towards recognizing robot language instructions,” Connect. Sci. 18, 1-22 (2006). [CrossRef]
  15. D. V. Buonomano and M. M. Merzenich, “A neural network model of temporal code generation and position invariant pattern recognition,” Neural Comput. 11, 103-116 (1999). [CrossRef] [PubMed]
  16. T. Ichishita and R. Fujii, “Performance evaluation of a temporal sequence learning spiking neural network,” in Proceedings of the 7th IEEE International Conference on Computer and Information Technology (IEEE, 2007).
  17. K-Team, Inc.; available online at http://www.k-team.com/.
  18. W. Rall, “Branching dendritic trees and motoneuron membrane resistivity,” Exp. Neurol. 1, 491-527 (1959). [CrossRef] [PubMed]
  19. M. Djurfeldt, M. Lundqvist, C. Johansson, M. Rehn, O. Ekeberg, and A. Lansner, “Brain-scale simulation of the neocortex on the IBM Blue Gene/L supercomputer,” IBM J. Res. Dev. 52, 31-41 (2008). [CrossRef]
  20. J.-P. Tiesel and A. S. Maida, “Using parallel GPU architecture for simulation of planar I/F networks,” in International Joint Conference on Neural Networks (IEEE, 2009). [CrossRef]
  21. J. M. Nageswarana, N. Dutt, J. L. Krichmar, A. Nicolau, and A. V. Veidenbauma, “A configurable simulation environment for the efficient simulation of large-scale spiking neural networks on graphics processors,” Neural Networks 22, 791-800 (2009). [CrossRef]
  22. N. Satish, M. Harris, and M. Garland, “Designing efficient sorting algorithms for manycore GPUs,” in IEEE International Symposium on Parallel and Distributed Processing (IEEE, 2009). [CrossRef]
  23. M. Harris, “Optimizing parallel reduction in CUDA,” http://developer.download.nvidia.com/compute/cuda/1_1/Website/projects/reduction/doc/reduction.pdf.

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