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Applied Optics

Applied Optics

APPLICATIONS-CENTERED RESEARCH IN OPTICS

  • Editor: Joseph N. Mait
  • Vol. 51, Iss. 18 — Jun. 20, 2012
  • pp: 4003–4012

Hardware architecture of high-performance digital hologram generator on the basis of a pixel-by-pixel calculation scheme

Young-Ho Seo, Yoon-Hyuk Lee, Ji-Sang Yoo, and Dong-Wook Kim  »View Author Affiliations


Applied Optics, Vol. 51, Issue 18, pp. 4003-4012 (2012)
http://dx.doi.org/10.1364/AO.51.004003


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Abstract

In this paper we propose a hardware architecture for high-speed computer-generated hologram generation that significantly reduces the number of memory access times to avoid the bottleneck in the memory access operation. For this, we use three main schemes. The first is pixel-by-pixel calculation, rather than light source-by-source calculation. The second is a parallel calculation scheme extracted by modifying the previous recursive calculation scheme. The last scheme is a fully pipelined calculation scheme and exactly structured timing scheduling, achieved by adjusting the hardware. The proposed hardware is structured to calculate a row of a computer-generated hologram in parallel and each hologram pixel in a row is calculated independently. It consists of and input interface, an initial parameter calculator, hologram pixel calculators, a line buffer, and a memory controller. The implemented hardware to calculate a row of a 1920×1080 computer-generated hologram in parallel uses 168,960 lookup tables, 153,944 registers, and 19,212 digital signal processing blocks in an Altera field programmable gate array environment. It can stably operate at 198 MHz. Because of three schemes, external memory bandwidth is reduced to approximately 1/20,000 of the previous ones at the same calculation speed.

© 2012 Optical Society of America

OCIS Codes
(090.1760) Holography : Computer holography
(090.1995) Holography : Digital holography

ToC Category:
Holography

History
Original Manuscript: February 21, 2012
Revised Manuscript: March 23, 2012
Manuscript Accepted: March 23, 2012
Published: June 12, 2012

Citation
Young-Ho Seo, Yoon-Hyuk Lee, Ji-Sang Yoo, and Dong-Wook Kim, "Hardware architecture of high-performance digital hologram generator on the basis of a pixel-by-pixel calculation scheme," Appl. Opt. 51, 4003-4012 (2012)
http://www.opticsinfobase.org/ao/abstract.cfm?URI=ao-51-18-4003


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References

  1. T. Motoki, H. Isono, and I. Yuyama, “Present status of three-dimensional television research,” Proc. IEEE 83, 1009–1021 (1995). [CrossRef]
  2. J. K. Chung and M. H. Tsai, Three-Dimensional Holographic Imaging (Wiley, 2002).
  3. P. Hariharan, Basics of Holography (Cambridge University, 2002).
  4. M. Lucente, “Interactive computation of holograms using a look-up table,” J. Electron. Imaging 2, 28–34 (1993). [CrossRef]
  5. H. Yoshikawa, “Fast computation of Fresnel holograms employing difference,” Opt. Rev. 8, 331–335 (2001).
  6. T. Shimobaba and T. Ito, “An efficient computational method suitable for hardware of computer-generated hologram with phase computation by addition,” Comput. Phys. Commun. 138, 44–52 (2001). [CrossRef]
  7. N. Masuda, T. Ito, T. Tanaka, A. Shiraki, and T. Sugie, “Computer generated holography using a graphics processing unit,’’ Opt. Express 14, 603–608 (2006). [CrossRef]
  8. L. Ahrenberg, P. Benzie, M. Magnor, and J. Watson, “Computer generated holography using parallel commodity graphics hardware,” Opt. Express 14, 7636–7641 (2006). [CrossRef]
  9. Y. Pan, X. Xu, S. Solanki, X. Liang, R. Bin, A. Tanjung, C. Tan, and T.-C. Chong, “Fast CGH computation using S-LUT on GPU,” Opt. Express 17, 18543–18555 (2009). [CrossRef]
  10. Y.-Z. Liu, J.-W. Dong, Y.-Y. Pu, B.-C. Chen, H.-X. He, and H.-Z. Wang, “High-speed full analytical holographic computations for true-life scenes,” Opt. Express 18, 3345–3351 (2010). [CrossRef]
  11. T. Shimobaba, T. Ito, N. Masuda, Y. Ichihashi, and N. Takada, “Fast calculation of computer-generated-hologram on AMD HD5000 series GPU and OpenCL,” Opt. Express 18, 9955–9960 (2010). [CrossRef]
  12. T. Ito, N. Masuda, K. Yoshimura, A. Shiraki, T. Shimobaba, and T. Sugie, “Special-purpose computer HORN-5 for a real-time electroholography,” Opt. Express 13, 1923–1932 (2005). [CrossRef]
  13. Y. Ichihashi, H. Nakayama, T. Ito, N. Masuda, T. Shimobaba, A. Shiraki, and T. Sugie, “HORN-6 special-purpose clustered computing system for electroholography,” Opt. Express 17, 13895–13903 (2009). [CrossRef]
  14. Y.-H. Seo, H.-J. Choi, J.-S. Yoo, and D.-W. Kim, “An architecture of a high-speed digital hologram generator based on FPGA,” J. Syst. Archit. 56, 27–37 (2010). [CrossRef]
  15. Y.-H. Seo, H.-J. Choi, J.-S. Yoo, and D.-W. Kim, “Cell-based hardware architecture for full-parallel generation algorithm of digital holograms,” Opt. Express 19, 8750–8761 (2011). [CrossRef]

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