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Journal of Display Technology

Journal of Display Technology

| A JOINT IEEE/OSA PUBLICATION

  • Vol. 3, Iss. 3 — Sep. 1, 2007
  • pp: 309–314

New Gate-Bias Voltage-Generating Technique With Threshold-Voltage Compensation for On-Glass Analog Circuits in LTPS Process

Jung-Sheng Chen and Ming-Dou Ker

Journal of Display Technology, Vol. 3, Issue 3, pp. 309-314 (2007)


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Abstract

A new proposed gate-bias voltage-generating technique with threshold-voltage compensation for analog circuits in the low-temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) is proposed. The new proposed gate-bias voltage-generating circuit with threshold-voltage compensation has been successfully verified in an 8-μm LTPS process. The experimental results have shown that the impact of TFT threshold-voltage variation on the biasing circuit can be reduced from 30% to 5% under a biasing voltage of 3 V. The new proposed gate-bias voltage-generating technique with threshold-voltage compensation enables the analog circuits to be integrated and implemented by the LTPS process on glass substrate for an active matrix LCD panel.

© 2007 IEEE

Citation
Jung-Sheng Chen and Ming-Dou Ker, "New Gate-Bias Voltage-Generating Technique With Threshold-Voltage Compensation for On-Glass Analog Circuits in LTPS Process," J. Display Technol. 3, 309-314 (2007)
http://www.opticsinfobase.org/jdt/abstract.cfm?URI=jdt-3-3-309

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