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Journal of Display Technology

Journal of Display Technology

| A JOINT IEEE/OSA PUBLICATION

  • Vol. 5, Iss. 12 — Dec. 1, 2009
  • pp: 515–519

Self-Aligned Top-Gate Coplanar In-Ga-Zn-O Thin-Film Transistors

Cheng-Han Wu, Hsing-Hung Hsieh, Chih-Wei Chien, and Chung-Chih Wu

Journal of Display Technology, Vol. 5, Issue 12, pp. 515-519 (2009)


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Abstract

Self-aligned techniques are often used in conventional CMOS and Si-based thin-film transistors (TFTs) technologies due to various merits. In this paper, we report self-aligned coplanar top-gate InGaZnO TFTs using PECVD a-SiNx:H patterned to have low hydrogen content in the channel region and high hydrogen content in the source/drain region. After annealing to induce hydrogen diffusion from a-SiNx:H into the oxide semiconductor, the source–drain regions become more conductive and yet the channel region remains suitable for TFT operation, yielding a working self-aligned TFT structure. Such fabrication involves neither back-side exposure nor ion implantation, and thus may be compatible with the typical and cost-effective TFT manufacturing.

© 2009 IEEE

Citation
Cheng-Han Wu, Hsing-Hung Hsieh, Chih-Wei Chien, and Chung-Chih Wu, "Self-Aligned Top-Gate Coplanar In-Ga-Zn-O Thin-Film Transistors," J. Display Technol. 5, 515-519 (2009)
http://www.opticsinfobase.org/jdt/abstract.cfm?URI=jdt-5-12-515


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