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Journal of Display Technology

Journal of Display Technology


  • Vol. 7, Iss. 10 — Oct. 1, 2011
  • pp: 562–571

An Intra-Panel Interface With Clock-Embedded Differential Signaling for TFT-LCD Systems

H. K. Jeon, Y. H. Moon, J. K. Kang, and L. S. Kim

Journal of Display Technology, Vol. 7, Issue 10, pp. 562-571 (2011)

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In this paper, an intra-panel interface with a clock embedded differential signaling for TFT-LCD systems is proposed. The proposed interface reduces the number of signal lines between the timing controller and the column drivers in a TFT-LCD panel by adopting the embedded clock scheme. The protocol of the proposed interface provides a delay-locked loop (DLL)-based clock recovery scheme for the receiver. The timing controller and the column driver integrated with the proposed interface are fabricated in 0.13-µm CMOS process technology and 0.18-µm high voltage CMOS process technology, respectively. The proposed interface is verified on a 47-inch Full High-Definition (FHD) (1920RGB x 1080) TFT-LCD panel with 8-bit RGB and 120-Hz driving technology. The maximum data rate per differential pair was measured to be as high as 2.0 Gb/s in a wafer test.

© 2011 IEEE

H. K. Jeon, Y. H. Moon, J. K. Kang, and L. S. Kim, "An Intra-Panel Interface With Clock-Embedded Differential Signaling for TFT-LCD Systems," J. Display Technol. 7, 562-571 (2011)

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