Optical transimpedance receivers implemented in CMOS VLSI technologies are modeled and optimized for free-space optoelectronic interconnections. Sensitivity, bandwidth, power dissipation, and circuit area are analyzed for receivers using three different submicron CMOS processes. A comparison with the circuit noise limited optical power indicates that, for digital computing applications, the receiver sensitivity is limited by the gain-bandwidth product of the receiver amplifiers and the necessary noise margin of logic circuits.
Daniel A. Van Blerkom, Chi Fan, Matthias Blume, and Sadik C. Esener, "Transimpedance Receiver Design Optimization for Smart Pixel Arrays," J. Lightwave Technol. 16, 119- (1998)
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