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Journal of Lightwave Technology

Journal of Lightwave Technology


  • Vol. 27, Iss. 15 — Aug. 1, 2009
  • pp: 3303–3313

Integrated Silicon PIN Photodiodes Using Deep N-Well in a Standard 0.18-$\mu$m CMOS Technology

Berkehan Ciftcioglu, Member, IEEE, Lin Zhang, Member, IEEE, Jie Zhang, John R. Marciante, Member, IEEE, Jonathan Zuegel, Roman Sobolewski, and Hui Wu

Journal of Lightwave Technology, Vol. 27, Issue 15, pp. 3303-3313 (2009)

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This paper studies integrated silicon photodiodes (PDs) implemented in standard CMOS technologies. A new PIN PD structure utilizing deep n-well is presented, and compared with conventional vertical and lateral PIN PDs at 850-nm wavelength and different bias conditions. Prototype PDs were fabricated in a 0.18-$\mu$m standard CMOS technology, and their DC, impulse and frequency responses were characterized. A 70$\,\times\,$70 $\mu$m$^2$ PD with the new structure achieved a 3-dB bandwidth of 2.2 GHz in small signal at 5-V bias, whereas conventional lateral and vertical PIN PDs could only operate up to 0.94 GHz and 1.15 GHz, respectively. At 5-V bias, the impulse response of the new PD exhibited a full-width at half-maximum pulsewidth of 127 ps, versus 175 and 150 ps for the conventional lateral and vertical ones, respectively. At 15.5-V bias, the bandwidth of this new PD reached 3.13 GHz, with an impulse response pulsewidth of 102 ps. The responsivity of all prototype PDs was measured at approximately 0.14 A/W up to 10-V bias, which corresponded to a quantum efficiency of 20%. The responsivity of the new PD could be further increased to 0.4 A/W or 58% quantum efficiency, when operating in the avalanche region at 16.2-V bias.

© 2009 IEEE

Berkehan Ciftcioglu, Member, IEEE, Lin Zhang, Member, IEEE, Jie Zhang, John R. Marciante, Member, IEEE, Jonathan Zuegel, Roman Sobolewski, and Hui Wu, "Integrated Silicon PIN Photodiodes Using Deep N-Well in a Standard 0.18-$\mu$m CMOS Technology," J. Lightwave Technol. 27, 3303-3313 (2009)

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