OSA's Digital Library

Journal of Lightwave Technology

Journal of Lightwave Technology

| A JOINT IEEE/OSA PUBLICATION

  • Vol. 28, Iss. 9 — May. 1, 2010
  • pp: 1305–1315

Architectural Exploration of Chip-Scale Photonic Interconnection Network Designs Using Physical-Layer Analysis

Johnnie Chan, Gilbert Hendry, Aleksandr Biberman, and Keren Bergman

Journal of Lightwave Technology, Vol. 28, Issue 9, pp. 1305-1315 (2010)


View Full Text Article

Acrobat PDF (1573 KB)





Browse Journals / Lookup Meetings

Browse by Journal and Year


   


Lookup Conference Papers

Close Browse Journals / Lookup Meetings

Article Tools

Share
Citations
  • Export Citation/Save Click for help

Abstract

Chip-scale photonic interconnection networks have emerged as a promising technology solution that can address many of the scalability challenges facing the communication networks in next-generation high-performance multicore processors. Photonic interconnects can offer significantly higher bandwidth density, lower latencies, and better energy efficiency. Even though photonics exhibits these inherent advantages over electronics, the network designs that can successfully leverage these benefits cannot be straightforwardly extracted from typical electronic network methodologies and must consider the many unique physical-layer constraints of optical technologies. We conduct an architectural exploration of four chip-scale photonic interconnection networks in a novel simulation environment, measuring insertion loss, crosstalk, and power. We also explain and demonstrate the impact of these physical-layer metrics on the scalability, performance, and realizability of each design.

© 2010 IEEE

Citation
Johnnie Chan, Gilbert Hendry, Aleksandr Biberman, and Keren Bergman, "Architectural Exploration of Chip-Scale Photonic Interconnection Network Designs Using Physical-Layer Analysis," J. Lightwave Technol. 28, 1305-1315 (2010)
http://www.opticsinfobase.org/jlt/abstract.cfm?URI=jlt-28-9-1305


Sort:  Year  |  Journal  |  Reset

References

  1. N. Magen, A. Kolodny, U. Weiser, N. Shamir, "Interconnect-power dissipation in a microprocessor," Proc. Int. Workshop Syst. Level Interconnect Prediction (2004) pp. 7-13.
  2. C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, K. Asanovic, "Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics," IEEE Micro 29, 8-21 (2009).
  3. N. Kirman, M. Kirman, R. K. Dokania, J. F. Martinez, A. B. Apsel, M. A. Watkins, D. H. Albonesi, "On-chip optical technology in future bus-based multicore designs," IEEE Micro 27, 56-66 (2007).
  4. D. Vantrease, R. Schreiber, M. Monchiero, M. McLaren, N. P. Jouppi, M. Fiorentino, A. Davis, N. Binkert, R. G. Beausoleil, J. H. Ahn, "Corona: System implications of emerging nanophotonic technology," Proc. 35th Int. Symp. Comput. Archit. (2008) pp. 153-164.
  5. A. Shacham, K. Bergman, L. P. Carloni, "Photonic networks-on-chip for future generations of chip multiprocessors," IEEE Trans. Comput. 57, 1246-1260 (2008).
  6. F. Xia, L. Sekaric, Y. Vlasov, "Ultracompact optical buffers on a silicon chip," Nature Photon. 1, 65-71 (2006).
  7. W. Bogaerts, P. Dumon, D. V. Thourhout, R. Baets, "Low-loss, low-cross-talk crossings for silicon-on-insulator nanophotonic waveguides," OSA Opt. Lett. 32, 2801-2803 (2007).
  8. V. R. Almeida, R. R. Panepucci, M. Lipson, "Nanotaper for compact mode conversion," OSA Opt. Lett. 28, 1302-1304 (2003).
  9. J. Schrauwen, F. V. Laere, D. V. Thourhout, R. Baets, "Focused-ion-beam fabrication of slanted grating couplers in silicon-on-insulator waveguides," IEEE Photon. Technol. Lett. 19, 816-818 (2007).
  10. M. R. Watts, D. C. Trotter, R. W. Young, A. L. Lentine, "Ultralow power silicon microdisk modulators and switches," IEEE Int. Conf. Group IV Photonics SorrentoItaly (2008) Paper WA2.
  11. S. J. Koester, C. L. Schow, L. Schares, G. Dehlinger, J. D. Schaub, F. E. Doany, R. A. John, "Ge-on-SOI-detector/Si-CMOS-amplifier receivers for high-performance optical-communication applications," J. Lightw. Technol. 25, 46-57 (2007).
  12. B. G. Lee, A. Biberman, P. Dong, M. Lipson, K. Bergman, "All-optical comb switch for multiwavelength message routing in silicon photonic networks," IEEE Photon. Technol. Lett. 20, 767-769 (2008).
  13. B. G. Lee, A. Biberman, N. Sherwood-Droz, C. B. Poitras, M. Lipson, K. Bergman, "High-speed 2$\,\times\,$2 switch for multi-wavelength silicon photonic networks on-chip," J. Lightw. Technol. 27, 2900-2907 (2009).
  14. H. Wang, M. Petracca, A. Biberman, B. G. Lee, L. P. Carloni, K. Bergman, "Nanophotonic optical interconnection network architecture for on-chip and off-chip communications," Optical Fiber Communications Conf. San DiegoCA (2008) Paper JThA92.
  15. J. Chan, A. Biberman, B. G. Lee, K. Bergman, "Insertion loss analysis in a photonic interconnection network for on-chip and off-chip communications," Annual Meeting Lasers and Electro-Optics Society Newport BeachCA (2008) Paper TuT3.
  16. N. Sherwood-Droz, H. Wang, L. Chen, B. G. Lee, A. Biberman, K. Bergman, M. Lipson, "Optical 4$\,\times\,$4 hitless silicon router for optical networks-on-chip (NoC)," OSA Opt. Exp. 16, 15915-15922 (2008).
  17. B. G. Lee, A. Biberman, K. Bergman, N. Sherwood-Droz, M. Lipson, "Multi-wavelength message routing in a non-blocking four-port bidirectional switch fabric for silicon photonic networks-on-chip," Optical Fiber Communications Conf. San DiegoCA (2009) Paper OMJ4.
  18. A. Varga, "OMNeT++ discrete event simulation system," http://www.omnetpp.org.
  19. A. Kahng, B. Li, L. Peh, K. Samadi, "ORION 2.0: A fast and accurate NoC power and area model for early-stage design space exploration," Design, Automation and Test in Europe Conference and Exhibition NiceFrance (2009).
  20. M. Uenuma, T. Moooka, "Temperature-independent silicon waveguide optical filter," OSA Opt. Lett. 34, 599-601 (2009).
  21. T. Gensty, W. Elsäßer, C. Mann, "Intensity noise properties of quantum cascade lasers," OSA Opt. Exp. 13, 2032-2039 (2005).
  22. Fiber Optic Test and Measurement (Prentice-Hall, 1997) pp. 146-282.
  23. Q. Xu, S. Manipatruni, B. Schmidt, J. Shakya, M. Lipson, "12.5 Gbit/s carrier-injection-based silicon micro-ring silicon modulators," OSA Opt. Exp. 15, 430-436 (2007).
  24. K. Preston, S. Manipatruni, A. Gondarenko, C. B. Poitras, M. Lipson, "Deposited silicon high-speed integrated electro-optic modulator," OSA Opt. Exp. 17, 5118-5124 (2009).
  25. B. P. Lathi, Modern Digital and Analog Communication Systems (Oxford University Press, 1998) pp. 577-625.
  26. G. Hendry, A. Biberman, J. Chan, S. Kamil, B. G. Lee, M. Mohiyuddin, K. Bergman, L. P. Carloni, L. Oliker, J. Shalf, "Analysis of photonic networks for a chip multi-processor using scientific applications," Proc. Int. Symp. Networks-on-Chip (2009) pp. 104-113.

Cited By

OSA is able to provide readers links to articles that cite this paper by participating in CrossRef's Cited-By Linking service. CrossRef includes content from more than 3000 publishers and societies. In addition to listing OSA journal articles that cite this paper, citing articles from other participating publishers will also be listed.

« Previous Article  |  Next Article »

OSA is a member of CrossRef.

CrossCheck Deposited