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Journal of Lightwave Technology

Journal of Lightwave Technology

| A JOINT IEEE/OSA PUBLICATION

  • Vol. 31, Iss. 18 — Sep. 15, 2013
  • pp: 2988–2993

Hybrid Clock Recovery for a Gigabit POF Transceiver Implemented on FPGA

Julio Ramírez, Antonino Nespola, Stefano Straullu, Paolo Savio, Silvio Abrate, and Roberto Gaudino

Journal of Lightwave Technology, Vol. 31, Issue 18, pp. 2988-2993 (2013)


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Abstract

In this paper, we present a clock recovery system implemented on field programmable gate array and integrated to the Gigabit Ethernet media converter for PMMA SI-POF developed within the framework of the POF-PLUS EU Project. We demonstrate timing synchronizing using only one sample per symbol from a highly distorted and attenuated 2-PAM signal without requiring any sort of preequalization. This is achieved by means of a hybrid analog–digital PLL with a timing error detector based on a modified version of the Müller and Mueller algorithm, a loop filter, and a VCXO.

© 2013 IEEE

Citation
Julio Ramírez, Antonino Nespola, Stefano Straullu, Paolo Savio, Silvio Abrate, and Roberto Gaudino, "Hybrid Clock Recovery for a Gigabit POF Transceiver Implemented on FPGA," J. Lightwave Technol. 31, 2988-2993 (2013)
http://www.opticsinfobase.org/jlt/abstract.cfm?URI=jlt-31-18-2988


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References

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