Abstract

Unprecedented transistor integration capacity will exist to make computing truly ubiquitous, but the energy consumption will be a major challenge. Compute energy can be reduced by employing near threshold voltage operation, and advances in memory architecture will reduce memory energy. However, energy consumed in data movement over interconnects will become prohibitive. Severe tapering of interconnect bandwidth brings interconnect energy within limit, but potentially hinders the system performance. Hence, a holistic hardware/software codesigned system approach is required.

© 2013 IEEE

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