Abstract
High performance computing systems are becoming increasingly limited by the capacity of
interconnects due to the continued scaling down of CMOS critical dimensions, resulting in the
implementation of optical interconnects at ever decreasing distances. At the chip level, the
communication bottleneck and energy consumption per bit are now major limitations to the continued
performance scaling of microprocessors. In this paper, a novel integrated photonic approach is
presented that uses polymer waveguides and surface-normal GaAs/AlAs multiple quantum well devices
integrated directly onto a silicon chip. The concept provides sub-pJ/b performance and seamless
interfacing between the on- and off-chip domains. This is the first demonstrated waveguide-coupled
surface-normal MQW-based approach to be fully integrated within a photonic layer and to a large
extent mitigates packaging issues for future photonics systems integrated with Si chips. Key
aspects of the architecture are efficient and minimum-footprint optical fabrics and
low-power-consuming optical transceivers. Gray-scale lithography is used to fabricate the 3-D
coupling structures directly in the waveguide polymer layer. Analyses and experimental results
show that the optical fabric concept provides the necessary bandwidth density and low power
consumption for future chip-scale interconnections.
© 2013 IEEE
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