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Journal of the Optical Society of Korea

Journal of the Optical Society of Korea

| PUBLISHED BY THE OPTICAL SOCIETY OF KOREA

  • Vol. 6, Iss. 4 — Dec. 30, 2002
  • pp: 180–184

Gate CD Control for memory Chip using Total Process Proximity Based Correction Method

Byung-Ho Nam and Hyung-J. Lee  »View Author Affiliations


Journal of the Optical Society of Korea, Vol. 6, Issue 4, pp. 180-184 (2002)


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Abstract

In this study, we investigated mask errors, photo errors with attenuated phase shift mask and off-axis illumination, and etch errors in dry etch conditions. We propose that total process proximity correction (TPPC), a concept merging every process step error correction, is essential in a lithography process when minimum critical dimension (CD) is smaller than the wavelength of radiation. A correction rule table was experimentally obtained applying TPPC concept. Process capability of controlling gate CD in DRAM fabrication should be improved by this method.

© 2002 Optical Society of Korea

OCIS Codes
(110.5220) Imaging systems : Photolithography

History
Original Manuscript: September 10, 2002
Published: December 1, 2002

Citation
Byung-Ho Nam and Hyung-J. Lee, "Gate CD Control for memory Chip using Total Process Proximity Based Correction Method," J. Opt. Soc. Korea 6, 180-184 (2002)
http://www.opticsinfobase.org/josk/abstract.cfm?URI=josk-6-4-180


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References

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