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Design rules for p-i-n diode carriers sweeping in nano-rib waveguides on SOI |
Optics Express, Vol. 19, Issue 10, pp. 9915-9922 (2011)
http://dx.doi.org/10.1364/OE.19.009915
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Abstract
In this paper we present a detailed analysis of the carrier lifetime for a p-i-n junction on silicon nano-rib waveguides. Several factors determining efficiency of carriers removal from the waveguiding region will be discussed. We compare different structure geometries and spacings between p and n doped regions to show the way to optimize electrons and holes sweeping for CW nonlinear optical devices.
© 2011 OSA
OCIS Codes
(230.7370) Optical devices : Waveguides
(250.5300) Optoelectronics : Photonic integrated circuits
(250.4390) Optoelectronics : Nonlinear optics, integrated optics
ToC Category:
Optoelectronics
History
Original Manuscript: March 14, 2011
Revised Manuscript: April 30, 2011
Manuscript Accepted: May 3, 2011
Published: May 5, 2011
Citation
Andrzej Gajda, Lars Zimmermann, J. Bruns, B. Tillack, and K. Petermann, "Design rules for p-i-n diode carriers sweeping in nano-rib waveguides on SOI," Opt. Express 19, 9915-9922 (2011)
http://www.opticsinfobase.org/oe/abstract.cfm?URI=oe-19-10-9915
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