OSA's Digital Library

Optics Express

Optics Express

  • Editor: C. Martijn de Sterke
  • Vol. 19, Iss. 5 — Feb. 28, 2011
  • pp: 4722–4727

Vertical chip-to-chip coupling between silicon photonic integrated circuits using cantilever couplers

Peng Sun and Ronald M. Reano  »View Author Affiliations


Optics Express, Vol. 19, Issue 5, pp. 4722-4727 (2011)
http://dx.doi.org/10.1364/OE.19.004722


View Full Text Article

Enhanced HTML    Acrobat PDF (1055 KB)





Browse Journals / Lookup Meetings

Browse by Journal and Year


   


Lookup Conference Papers

Close Browse Journals / Lookup Meetings

Article Tools

Share
Citations

Abstract

We demonstrate vertical chip-to-chip light coupling using silicon strip waveguide cantilever couplers. The guided-wave couplers consist of silicon strip waveguides embedded within silicon dioxide cantilevers. The cantilevers deflect 90° out-of-plane via residual stress, allowing vertical light coupling between separate chips. A chip-to-chip coupling loss of 2.5 dB per connection is measured for TE polarization and 1.1 dB for TM polarization at 1550 nm wavelength. The coupling loss varies by less than ± 0.8 dB within the wavelength range from 1500 nm to 1565 nm for both polarizations. The couplers enable broadband and compact system architectures involving high speed vertical data transport between photonic integrated circuits.

© 2011 OSA

OCIS Codes
(130.3120) Integrated optics : Integrated optics devices
(200.4650) Optics in computing : Optical interconnects

ToC Category:
Integrated Optics

History
Original Manuscript: January 19, 2011
Revised Manuscript: February 17, 2011
Manuscript Accepted: February 18, 2011
Published: February 24, 2011

Citation
Peng Sun and Ronald M. Reano, "Vertical chip-to-chip coupling between silicon photonic integrated circuits using cantilever couplers," Opt. Express 19, 4722-4727 (2011)
http://www.opticsinfobase.org/oe/abstract.cfm?URI=oe-19-5-4722


Sort:  Author  |  Year  |  Journal  |  Reset  

References

  1. D. Burger, J. R. Goodman, and A. Kägi, “Limited bandwidth to affect processor design,” IEEE Micro 17(6), 55–62 (1997). [CrossRef]
  2. A. V. Krishnamoorthy, R. Ho, X. Zheng, H. Schwetman, J. Lexau, P. Koka, G. Li, I. Shubin, and J. E. Cunningham, “Computer systems based on silicon photonic interconnects,” Proc. IEEE 97(7), 1337–1361 (2009). [CrossRef]
  3. J. W. Goodman, F. J. Leonberger, S.-Y. Kung, and R. A. Athale, “Optical interconnections for VLSI systems,” Proc. IEEE 72(7), 850–866 (1984). [CrossRef]
  4. D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97(7), 1166–1185 (2009). [CrossRef]
  5. X. Zheng, J. E. Cunningham, I. Shubin, J. Simons, M. Asghari, D. Feng, H. Lei, D. Zheng, H. Liang, C.-C. Kung, J. Luff, T. Sze, D. Cohen, and A. V. Krishnamoorthy, “Optical proximity communication using reflective mirrors,” Opt. Express 16(19), 15052–15058 (2008). [CrossRef] [PubMed]
  6. B. S. Rho, S. H. Hwang, J. W. Lim, G. W. Kim, C. H. Cho, and W.-J. Lee, “Intra-system optical interconnection module directly integrated on a polymeric optical waveguide,” Opt. Express 17(3), 1215–1221 (2009). [CrossRef] [PubMed]
  7. L. Schares, J. A. Kash, F. E. Doany, C. L. Schow, C. Schuster, D. M. Kuchta, P. K. Pepeljugoski, J. M. Trewhella, C. W. Baks, R. A. John, L. Shan, Y. H. Kwark, R. A. Budd, P. Chiniwalla, F. R. Libsch, J. Rosner, C. K. Tsang, C. S. Patel, J. D. Schaub, R. Dangel, F. Horst, B. J. Offrein, D. Kucharski, D. Guckenberger, S. Hegde, H. Nyikal, C.-K. Lin, A. Tandon, G. R. Trott, M. Nystrom, D. P. Bour, M. R. T. Tan, and D. W. Dolfi, “Terabus: terabit/second-class card-level optical interconnect technologies,” IEEE J. Sel. Top. Quantum Electron. 12(5), 1032–1044 (2006). [CrossRef]
  8. H. Yamada, M. Nozawa, M. Kinoshita, and K. Ohashi, “Vertical-coupling optical interface for on-chip optical interconnection,” Opt. Express 19(2), 698–703 (2011). [CrossRef] [PubMed]
  9. M. Jöhnck, B. Wittmann, and A. Neyer, “64 channel 2D POF-based optical array interchip interconnect,” J. Opt. A, Pure Appl. Opt. 1(2), 313–316 (1999). [CrossRef]
  10. P. Sun and R. M. Reano, “Cantilever couplers for intra-chip coupling to silicon photonic integrated circuits,” Opt. Express 17(6), 4565–4574 (2009). [CrossRef] [PubMed]
  11. T. Shoji, T. Tsuchizawa, T. Watanabe, K. Yamada, and H. Morita, “Low loss mode size converter from 0.3 µm square Si wire waveguides to singlemode fibres,” Electron. Lett. 38(25), 1669–1670 (2002). [CrossRef]
  12. V. R. Almeida, R. R. Panepucci, and M. Lipson, “Nanotaper for compact mode conversion,” Opt. Lett. 28(15), 1302–1304 (2003). [CrossRef] [PubMed]
  13. R. Charavel, B. Olbrechts, and J. P. Raskin, “Stress release of PECVD oxide by RTA,” Proc. SPIE 5116, 596–606 (2003). [CrossRef]

Cited By

Alert me when this paper is cited

OSA is able to provide readers links to articles that cite this paper by participating in CrossRef's Cited-By Linking service. CrossRef includes content from more than 3000 publishers and societies. In addition to listing OSA journal articles that cite this paper, citing articles from other participating publishers will also be listed.


« Previous Article  |  Next Article »

OSA is a member of CrossRef.

CrossCheck Deposited