1. Introduction
Several phase locking schemes for optical homodyne detection at nanowatt signal power levels are known, namely the balanced loop [
1
L. G. Kazovsky and D. A. Atlas, “A 1320-nm Experimental Optical Phase-Locked Loop: Performance Investigation and PSK Homodyne Experiments at 140 Mb/s and 2 Gb/s,” J. Lightwave Technol.
8, 1414–1425 (1990). [CrossRef]
], the costas or decision-driven loop [
2
D. F. Hornbachner, M. A. Schreiblehner, W. R. Leeb, and A. L. Scholtz, “Experimental determination of power penalty contributions in an optical Costas-type phase-locked loop receiver,” in Free-Space Laser Communication Technologies IV
, Proc. SPIE
1635, 10–18 (1992).
,
3
S. Norimatsu, K. Iwashita, and K. Noguchi, “An 8 Gb/s QPSK Optical Homodyne Detection Experiment Using External-Cavity Laser Diodes,” IEEE Photon. Technol. Lett.
4, 765–767 (1992). [CrossRef]
] and the SyncBit loop [
4
B. Wandernoth“20 Photon/Bit 565 Mbit/s PSK Homodyne Receiver using Synchronisation Bits,” IEE Electron. Lett.
28, 387–388 (1992). [CrossRef]
]. In the application of broadband inter-satellite communication, all of these loops have specific benefits and drawbacks. The balanced loop is a simple design with a conventional 180° 3 dB hybrid in the receiver, but it requires the transmission of a residual carrier. The residual carrier increases the average signal power, which will drive an average-power limited optical amplifier, situated on the transmitting satellite, more likely into saturation. The costas or decision-driven loop does not need a carrier signal for phase locking, due to the detection of in-phase and quadrature signal components. To perform this operation, it requires an optical 90° hybrid with a coupling factor different from 3 dB (e.g., 90% in-phase, 10% quadrature). Compared to a 180° 3 dB hybrid, the complexity of such a device is significantly increased [
5
W. R. Leeb, “Optical 90° Hybrid for Costas-Type Receivers,” IEE Electron. Lett.
26, 1431–1432 (1990). [CrossRef]
]. The SyncBit loop circumvents both the 90° coupler and the residual carrier transmission, at the cost of high speed signal processing electronics on the transmitting and receiving satellite. Furthermore, it is restricted to purely digital data transmission.
This article proposes a new type of OPLL, which was specifically designed for broadband inter-satellite communication at nanowatt signal power levels. It employs a 180 ° 3 dB optical hybrid with an AC-coupled balanced front end. The transmitted data can be any analog or digital signal with a constant envelope. Due to the variety of accepted input signals, an optical link with such a receiver can be considered as transparent to the user. Since the OPLL extracts the phase error signal by synchronously demodulating a deterministic LO phase disturbance, it is called dither loop.
2. OPLL principle of operation
The proposed OPLL design, in conjunction with the experimental system setup, is shown in
Fig. 1. A sinusoidal signal (called the dither signal) of small amplitude and frequency
ωd
is applied to the LO fast (piezo) frequency tuning input. The dither signal amplitude is chosen such that it generates a LO phase deviation of approximately ±10°, and the dither frequency has to be much higher (e.g., by a factor of 10) than the natural frequency of the loop. The LO phase deviation propagates through the balanced receiver and can be measured at the system output as a fluctuation in signal power. This is done with a power detector, followed by a bandpass filter. The bandwidths of the detector and the filter are chosen such that they do not limit the loop dynamics. In a multiplier, the power fluctuation is synchronously demodulated with the dither signal. The 90° delay before the multiplier has to be introduced because of the frequency-to-phase conversion in the LO. The low pass filtered output signal of the multiplier is proportional to the phase error and can be used for LO phase control.
Figure 2(a) shows a signal-space representation for BPSK transmitted data at different phase error conditions, with magnified views in subsequent
Figs. 2(b)-
2(d). In
Fig. 2(b), the phase error is zero, therefore the LO carrier harmonically oscillates around the in-phase axis. The detected signal power at the system output is maximum when the dither signal has a zero crossing, and drops to a certain level at a minimum and maximum of the dither signal. Thus, the main component of the power fluctuation has twice the frequency of the dither signal. The beat product of these two signals after the multiplier is far beyond the loop filter bandwidth (at
ωd
and 3
ωd
), generating a loop filter output of zero. The LO phase remains constant, and the system is in a stable operating condition for zero phase error. In
Fig. 2(c), the signal-space diagram is drawn for a positive phase error. The main component of the power fluctuation has the same frequency, but is 180° out of phase to the dither signal. Multiplication yields negative low frequency components, resulting in a loop filter output which is less than zero. Consequently, in case of a negative phase error, shown in
Fig. 2(d), the power fluctuation is equal in frequency and phase, and the loop filter feeds a positive value into the LO frequency control input. In both cases, the phase error will decrease.
It must be pointed out that the dithered LO phase reduces the receiver sensitivity, e.g. a dither amplitude of±10° leads to a power penalty of 0.14 dB. Such a power penalty is present in every OPLL type, either as incomplete modulation of the carrier (balanced loop), quadrature component detection (costas or decision-driven loop), or an increased noise bandwidth of the receiver (SyncBit loop). From its communication performance, the presented phase locking scheme is comparable to previous designs. But the dither loop reduces the technological complexity by using a 180° 3 dB optical hybrid and an AC-coupled balanced front end. Furthermore, the carrier-suppressed transmitter output signal is minimized in average power and therefore well suited for optical amplification.
Fig. 1. Experimental system setup with proposed new OPLL (blue indicates optical components). Free space losses are simulated with an optical attenuator.
Fig. 2. Signal-space diagram for BPSK transmitted data at different phase error conditions. I: in-phase axis, Q: quadrature axis, t: time, sd
(t): dither signal, spwd
(t): bandpass filtered power detector output signal.
3. Experimental results
An experimental system has been set up as shown in
Fig. 1. Optical sources for the transmitter (TX) and LO are diode pumped Nd:YAG lasers emitting at 1064 nm. All optical components are fiber coupled with polarization maintaining fibers. All electrical circuits, except the front-end, are made of HiRel (military or space) components. The feedback loop has three poles and a natural frequency of 10 kHz. The third pole has been introduced to suppress 1/
f frequency noise components of the lasers. The dither frequency is 110 kHz, and the dither amplitude is approximately ±10°. For shot noise limited operation of the receiver, a LO power of 10 mW has been chosen. Additional circuits of the system include a modulator bias control loop to suppress the optical carrier, and a field-programmable gate array (FPGA) based logic that thermally scans the LO frequency for initial acquisition.
A single phase-locking event is shown in
Fig. 3(a). On the left side of the oscillogram (
t<500
µs), TX and LO frequencies differ by more than 10 kHz. Due to this, the acquisition logic keeps the system in open loop mode. The power detector output signal (lower trace in
Fig. 3(a)) follows the envelope of the beat product of the two optical sidebands. When the acquisition logic detects an intermediate frequency of 10 kHz or less (
t=500
µs), the loop is closed and the LO frequency and phase is adjusted without cycle slip (500
µs<
t<800
µs). The detected power in closed loop mode decreases in
Fig. 3(a) due to AC-coupling of the according signal.
Fig. 3. Measurement results.
Figure 3(b) shows results of a BPSK communication test, transmitting a PRBS-31 signal at a data rate of 400 Mbit/s. For a BER of 10
-9, an average optical power of -55.7 dBm, or 36 photons/bit, is required. This is a power penalty of 6 dB to the shot noise limit of 9 photons/bit. The low quantum efficiency of the photodiodes accounts for the main optical losses (2.5 dB). Additional losses are due to phase dithering, the residual phase error, and optical losses in couplers and connectors. To verify the results of the BER test, an analog transmission experiment has been performed. A single 800 MHz carrier was transmitted to measure the signal-to-noise ratio (SNR) at the system output. When assuming Gaussian distributed noise processes, the BER can be calculated from SNR [
6
J. R. Barry and E. A. Lee, “Performance of Coherent Optical Receivers,” in Proceedings of the IEEE
(Institute of Electrical and Electronics Engineers, New York, 1990), pp. 1369–1394. [CrossRef]
] using
where
er f c(·) is the complementary error function. It can be seen in
Fig. 3(b) that the analog and digital transmission tests agree very well.
4. Conclusion
A new type of OPLL is presented. It employs a conventional 180° 3 dB hybrid and an AC-coupled balanced front end. The loop does not require the transmission of a residual carrier for phase locking. Analog or digital data and various modulation formats are accepted. The only constraint to the user signal is a constant envelope. A first digital communication test indicated a receiver sensitivity of 36 photons/bit for a PRBS-31 signal at a data rate of 400 Mbit/s (BER=10-9). Due to its technological simplicity and tolerance to various signal formats, the proposed OPLL is well suited for broadband inter-satellite communication.
Acknowledgments
We kindly acknowledge the support by the Swiss Federal Innovation Promotion Agency; contract/grant No. KTI-5631.1.
References and links
1. |
L. G. Kazovsky and D. A. Atlas, “A 1320-nm Experimental Optical Phase-Locked Loop: Performance Investigation and PSK Homodyne Experiments at 140 Mb/s and 2 Gb/s,” J. Lightwave Technol.
8, 1414–1425 (1990). [CrossRef] |
2. |
D. F. Hornbachner, M. A. Schreiblehner, W. R. Leeb, and A. L. Scholtz, “Experimental determination of power penalty contributions in an optical Costas-type phase-locked loop receiver,” in Free-Space Laser Communication Technologies IV
, Proc. SPIE
1635, 10–18 (1992).
|
3. |
S. Norimatsu, K. Iwashita, and K. Noguchi, “An 8 Gb/s QPSK Optical Homodyne Detection Experiment Using External-Cavity Laser Diodes,” IEEE Photon. Technol. Lett.
4, 765–767 (1992). [CrossRef] |
4. |
B. Wandernoth“20 Photon/Bit 565 Mbit/s PSK Homodyne Receiver using Synchronisation Bits,” IEE Electron. Lett.
28, 387–388 (1992). [CrossRef] |
5. |
W. R. Leeb, “Optical 90° Hybrid for Costas-Type Receivers,” IEE Electron. Lett.
26, 1431–1432 (1990). [CrossRef] |
6. |
J. R. Barry and E. A. Lee, “Performance of Coherent Optical Receivers,” in Proceedings of the IEEE
(Institute of Electrical and Electronics Engineers, New York, 1990), pp. 1369–1394. [CrossRef] |