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Optics Express

  • Vol. 16, Iss. 16 — Aug. 4, 2008
  • pp: 11682–11690
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Impedance matching vertical optical waveguide couplers for dense high index contrast circuits

Rong Sun, Mark Beals, Andrew Pomerene, Jing Cheng, Ching-yin Hong, Lionel Kimerling, and Jurgen Michel  »View Author Affiliations


Optics Express, Vol. 16, Issue 16, pp. 11682-11690 (2008)
http://dx.doi.org/10.1364/OE.16.011682


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Abstract

We designed and demonstrated a compact, high-index contrast (HIC) vertical waveguide coupler for TE single mode operation with the lowest coupling loss of 0.20 dB ± 0.05 dB at 1550 nm. Our vertical coupler consists of a pair of vertically overlapping inverse taper structures made of SOI and amorphous silicon. The vertical coupler can suppress power oscillation observed in regular directional couplers and guarantees vertical optical impedance matching with great tolerance for fabrication and refractive index variations of the waveguide materials. The coupler furthermore shows excellent broadband coupling efficiencies between 1460 nm and 1570 nm.

© 2008 Optical Society of America

1. Introduction

While Moore’s law which governs the scaling of integrated transistors on a silicon chip approaches its fundamental limit, electronic-photonic convergence is becoming widely recognized as a potential path to deliver improved performance in terms of increasing bandwidth and minimized energy consumption [1

1. R. Kirchain and L.C. Kimerling, “A roadmap for nanophotonics,” Nature Photon. 1, 303–305 (2007). [CrossRef]

]. Silicon provides an ideal platform for chip level photonics integration of waveguides, filters, modulators and photodetectors with CMOS transistors [2-5

2. Q. Xu, B. Schmidt, S. Pradhan, and M. Lipson, “Micrometre-scale silicon electro-optic modulator,” Nature 435, 325–327 (2005). [CrossRef] [PubMed]

]. A common approach for integration of photonic components utilizes a coplanar design with silicon-on-insulator (SOI) substrates. This limits the pattern density and creates restrictions for scaling. A 3D integration approach can significantly increase the device density on a single wafer. In order to efficiently route and transmit an optical signal among different levels of photonic devices, a low loss vertical waveguide coupler is indispensable.

We designed and demonstrated a monolithic integratable vertical waveguide coupler which is capable of transmitting TE mode optical signal between a bottom SOI waveguide and a higher level PECVD amorphous silicon waveguide. PECVD amorphous silicon is best described as hydrogenated amorphous silicon (a-Si:H, in the following content we use a-Si for simplicity reason). Our prototype device has a minimum coupling loss of 0.20 ± 0.05 dB at 1550 nm and is capable of low loss broadband transmission between 1460 nm and 1570 nm. Comparing to regular directional couplers, our design, based on two overlapped inverse tapers, suppresses power oscillation and exhibits significant tolerance towards materials and fabrication variations, guaranteeing vertical optical impedance matching utilizing a simple solution.

2. Design

A conventional directional coupler with two adjacent, parallel waveguides is well understood [6

6. B. E. A. Saleh and M. C. Teich, Fundamentals of Photonics (P266, John Wiley & Sons, Inc., 1991). [CrossRef]

, 7

7. H. A. Haus, Wave and Fields in Optoelectronics (P218, Prentice-Hall, Inc., Englewood Cliffs, NJ, 1984).

]. According to Saleh, 100% power transfer requires perfect optical impedance matching where the effective indices of the two waveguides are identical and the coupling length is exactly equal to the transfer distance at which 100% power transfer is complete. However, a vertical coupler based on a conventional directional coupler design is not robust. Firstly, for a vertical coupler consisting of two different waveguide materials, e.g. SOI crystalline Si (c-Si) and a-Si, index matching is difficult to achieve because the refractive index of a-Si depends greatly on deposition conditions and processes. Secondly, fabrication of a vertical coupler requires multiple process steps that introduce variations in the dimensions of the waveguides at each level. These variations in waveguide dimension will cause a deviation in the effective index of the waveguide. Lastly, waveguide misalignment will change the effective coupling gap between the two waveguides. A better engineering solution is needed.

Our vertical waveguide couplers are designed for TE single mode transmission from a bottom SOI channel waveguide to a top a-Si channel waveguide. a-Si is a good choice of high level waveguide material because it has a very high refractive index (3.3~3.7) and can be integrated in a process flow with SOI using a low temperature plasma enhanced CVD process. PECVD a-Si waveguides have been fabricated and demonstrated to have low optical transmission loss. The low loss property of these waveguides is attributed to hydrogen passivation of the silicon dangling bonds in the film [8

8. D. K. Sparacin, R. Sun, A. Agarwal, M. Beals, J. Michel, L. C. Kimerling, T. Conway, A. Pomerene, D. Carothers, M. Grove, D. M. Gill, M. S. Rasras, S. S. Patel, and A. E. White, “Low-loss amorphous silicon channel waveguides for integrated photonics,” Proceedings of 3rd IEEE International Conference on Group IV Photonics, 255–257, 2006.

]. The coupler consists of two vertically overlapped inverse tapers extending from the respective waveguides. Figure 1 shows the structure of a vertical coupler in 3D, top and side views. Waveguides are 500 nm wide and 200 nm tall designed for TE single mode operation at 1550 nm. The waveguide interlayer consists of 200 nm silicon dioxide (SiO2) (n = 1.46). The interlayer thickness was determined by the CMOS process flow that was used. The vertical coupling concept itself can be used for various interlayer thicknesses. The detailed process flow is described in Ref. 9.

Fig. 1. Schematic representation of the vertical coupler, consisting of a SOI and a-Si waveguide: (a) 3D view; (b) top view; and (c) side view of the vertical coupler with finite tip width (wt).

The inverse tapers have a shallow linear slope to ensure an adiabatic evolution of the optical mode. The linear taper is the simplest design for proof of concept although nonlinear tapers may provide a more optimized coupling performance. The top a-Si taper is designed to be centrally symmetric to the bottom SOI taper for simplicity. This design is significantly improved compared to similar designs in the literature that use only one inverse taper with either a straight waveguide or a slab layer [10

10. Y. Shani, C. H. Henry, R. C. Kistler, R. F. Kazarinov, and K. J. Orlowsky, “Integrated optic adiabatic polarization splitter on silicon,” Appl. Phys. Lett. 56, 120 (1990). [CrossRef]

, 11

11. A. Yariv and X. Sun, “Supermode Si/III-V hybrid lasers, optical amplifiers, and modulators: A proposal and analysis,” Opt. Express 15, 9147 (2007). [CrossRef] [PubMed]

]. The effective index matching condition of this design is illustrated in Fig. 2. The figure plots the effective index profiles for top and bottom tapers as a function of waveguide width which is plotted along the top and bottom x-axes, respectively. The figure illustrates the impact on utilizing a single taper design compared to a dual taper design for the vertical coupler using a-Si with SOI. The index for SOI silicon is constant at 3.5, whereas the index for a-Si can range between 3.3 and 3.7. If only the SOI waveguide is tapered, an index match condition can not be met with a-Si index greater than 3.5. Alternatively, if the upper a-Si waveguide is tapered, a matching condition with SOI can not be found for a-Si index less than 3.5. Tapering both waveguides provides greater tolerance in the variation of a-Si material properties and guarantees optical impedance matching for the optical power to be efficiently transferred regardless of a-Si refractive indices.

Fig. 2. The effective index profiles in a vertical coupler of SOI and a-Si. The cross-over points indicate at which position optical impedance matching between SOI and a-Si waveguides is achieved. The horizontal dashed and dotted lines represent untapered a-Si and SOI waveguides, respectively.

We examined the tolerance of our design on the a-Si index variation using the eigen-mode expansion (EME) approach in FIMMPROP (by Photon Design, Oxford, UK) [12

12. D. F. G. Gallagher and T. P. Felici, “Eigenmode expansion methods for simulation of optical propagation in photonics: Pros and cons,” Proc. SPIE 4987, 69–82 (2003). [CrossRef]

]. The EME approach was demonstrated to be an accurate approximation to finite-difference time domain (FDTD) approaches for mode evolution-based devices [13

13. M. R. Watts and H. A. Haus, “Integrated mode-evolution-based polarization rotators,” Opt. Lett. 29, 138 (2005). [CrossRef]

, 14

14. N-N Feng, R. Sun, L. C. Kimerling, and J. Michel, “Lossless strip-to-slot waveguide transformer,” Opt. Lett. 32, 1250 (2007). [CrossRef] [PubMed]

]. Figure 3(a) shows a side view of the dynamic power transfer process inside the vertical couplers (L = 60 μm, wt = 200 nm) for each a-Si index condition. The dotted rectangles outline the area of the tapered couplers. The dashed line highlights the location of the impedance matched condition where maximum power is transferred. As shown in Fig. 3(b), the loss per coupler is consistently less than 0.14 dB for all a-Si index condition and corresponds to coupling efficiencies above 96%. Another important advantage of our vertical coupler design is that power oscillation can be effectively suppressed. Unlike the optical mode in a conventional directional coupler that oscillates sinusoidally between two waveguides, in our tapered vertical coupler there is little power coupled back once it is transferred to the other waveguide due to the fact that mode matching conditions for both waveguides are only satisfied at the coupling point.

Fig. 3. (a) Mode coupling inside a vertical coupler (L = 60 μm, wt of 200 nm) with different a-Si refractive indices. White dotted rectangles highlight the cross section of the vertical coupler. (b) the corresponding coupling loss as a function of the a-Si refractive index. The SOI index is fixed at 3.5.

Although the mode matching condition between waveguides can always be satisfied in our vertical coupler, the total power transmission also depends on the coupler length and the tip width which defines the taper angle. Figure 4 summarizes the calculated coupling efficiencies as a function of coupler length for various tip widths using the same EME approach. In this analysis, the index of refraction for a-Si is set to 3.6 and is consistent with the index obtained in our fabricated devices. For long vertical couplers with L > 60 μm, coupling efficiencies of more than 99.5% (or less than 0.02 dB coupling loss) can be achieved. In this case, a zero tip width design can be used without breaking the adiabatic condition along the taper. This is also very desirable since it eliminates abrupt index changes thus reducing light scattering when the optical mode travels from waveguide into coupler region. However, practical fabrication of tip widths less than 120nm is very challenging using 193nm photolithography. Vertical couplers less than 60 μm long are desired for reduced footprint, but they can not use zero tip width due to loss of adiabatic conditions. Coupling efficiency decreases as tip width decreases at constant coupler length as shown in Fig. 4. A finite tip width reduces taper angle and helps mode evolution in the vertical coupler to stay lossless. For small refractive index differences in a c-Si/a-Si vertical coupler, high coupling efficiency can be obtained without tapering the coupler to zero width. For a given coupler length, a large tip width, or a small tapering angle, ensures the adiabatic mode evolution without causing significant reflection and scattering losses. In general, although a sufficient long coupler can ensure high coupling efficiency, more compact vertical couplers with L > 30 μm and wt ~ 200 nm can also guarantee an adiabatic transition with high coupling efficiency.

Fig. 4. Coupling efficiency for various taper tip widths (wt) as a function of coupler length. The refractive index of the a-Si taper is fixed at 3.6.

3. Experiment and discussion

Our test structures used finite tip widths of 200, 250, and 300 nm due to photolithography and other fabrication constraints. Coupler lengths were 30, 45, and 60 μm, resulting in 9 different coupler variations. The prototype devices were fabricated on 6 inch SOI substrates with 200 nm c-Si for the bottom waveguide and a 3 μm bottom oxide layer serving as the lower waveguide cladding. The bottom level SOI waveguide and the taper structures were defined using an ASML 5500/850 Deep UV Scanner and Applied Materials Centura silicon etcher. A 400 nm thick high-density plasma (HDP) PECVD SiO2 interlayer was deposited and chemical-mechanically polished (CMP) to 200 nm. A 400 nm thick PECVD a-Si layer was deposited using an Applied Materials P5000 lamp heated PECVD chamber at 350°C and CMP back to 200 nm forming the top waveguide material. The top a-Si waveguides were defined and fabricated with the same dimensions as the bottom SOI waveguides. Finally, another layer of 3 μm HDP PECVD SiO2 was deposited as the waveguide top cladding (see Ref.9 for more detail).

Fig. 5 (a) We estimate waveguide transmission loss by integrating sidewall roughness scattering and bulk absorption loss along taper structures; (b) corresponding mathematical formula, where li is the unit length at wi, Γ i aSi is the confinement factor for a-Si at wi, α i SOI and α i aSi are the sidewall scattering loss coefficients for SOI and a-Si at wi, α bulk aSi is the bulk absorption coefficient for a-Si. While α i and Γ i is a function of wi, α bulk is constant for a-Si. Here, we assume SOI silicon does not have bulk absorption at 1550 nm, α bulk SOI = 0.

Table 1. Measured total coupling loss, α(C), and simulated transmission loss, α(T), for the 9 different vertical couplers, e.g. α 30 is the loss coefficient for 30 μm long coupler. The loss is given in dB.

table-icon
View This Table

The difference between measured total coupling loss and simulated transmission loss, α(C)α(T), captures the intrinsic coupling loss as well as the scattering loss at taper tips during entry and exit. Because Fig. 4 suggests that the intrinsic coupling loss is very small, the majority of this difference must be related to taper tip scattering and other fabrication imperfection. Derived from our experiments, the following HIC vertical coupler design rules are evident:

  • 1. Design trade-offs for taper length L.
    • a. A taper has to be long enough to satisfy the adiabatic condition;
    • b. A longer taper introduces higher transmission loss;
    • c. A longer taper requires larger footprint.
  • 2. Design trade-offs for tip width wt.
    • a. A small wt increases taper sidewall roughness scattering;
    • b. A large wt increases the effective index discontinuity at the taper entries, thus increasing the scattering loss when the optical mode enters and exits vertical coupler.

4. Broadband performance

The broadband performance of our inverse taper vertical coupler is illustrated by a device application example of a butt-coupled GeSi photodetector integrated with a lower level SOI waveguide using a vertical coupler in Fig. 6(a). The light couples from the SOI waveguide to the a-Si waveguide, and then reaches the GeSi photodetector. While the traditional directional coupling only offers efficient coupling at around 1520 nm, our inverse taper vertical coupler achieves high efficiency coupling in a much broader wavelength range of 1470-1570 nm, as manifested by the significantly improved responsivity in a 100 nm-wide spectral range shown in Fig. 6(b). Detailed discussion can be found elsewhere [9

9. M. Beals, J. Michel, J. Liu, D. Ahn, D. K. Sparacin, R. Sun, C-Y Hong, L. C. Kimerling, A. Pomerene, D. Carothers, J. Beattie, A. Kopa, A. Apsel, M. S. Rasras, D. M. Gill, S. S. Patel, K. Y. Tu, Y-K Chen, and A. E. White, “Process Flow Innovations for Photonic Device Integration in CMOS,” Proc. SPIE 6898, 689804 (2008). [CrossRef]

, 16

16. J. Liu, D. Pan, S. Jongthammanurak, D. Ahn, C-Y Hong, M. Beals, L. C. Kimerling, and J. Michel, “Waveguide-Integrated Ge p-i-n Photodetectors on SOI Platform,” 3rd IEEE International Conference on Group IV Photonics,2006, 173

].

Fig. 6. Device application example for a tapered vertical coupler. (a) Schematic representation of a butt-coupled GeSi photodetector integrated with a vertical coupler of L = 45 μm, wt = 250 nm. (b) Detector responsivity comparison showing improved broadband detection using the inverse taper vertical coupler design as oppose to regular vertical directional coupler design. Figures are reproduced with permission.

5. Conclusions

We have designed and demonstrated a high performance vertical waveguide coupler that can ensure optical impedance matching conditions for a wide range of design and fabrication variations. For small refractive index differences in the c-Si/a-Si vertical coupler, high coupling efficiency can be obtained using non-zero tip width inverse taper structures. For small coupler lengths, a large tip width can ensure adiabatic mode evolution without causing significant loss due to reflection and scattering. Experimentally, we have achieved consistently low coupling loss of 0.20 ± 0.05 dB in our prototype devices. Our vertical waveguide coupler has been successfully adopted in device applications, and it is promising for future 3D photonic and electronic-photonic integration.

Acknowledgments

References and links

1.

R. Kirchain and L.C. Kimerling, “A roadmap for nanophotonics,” Nature Photon. 1, 303–305 (2007). [CrossRef]

2.

Q. Xu, B. Schmidt, S. Pradhan, and M. Lipson, “Micrometre-scale silicon electro-optic modulator,” Nature 435, 325–327 (2005). [CrossRef] [PubMed]

3.

J. Liu, J. Michel, W. Giziewicz, D. Pan, K. Wada, D. Cannon, L. C. Kimerling, J. Chen, F. O. Ilday, F. X. Kartner, and J. Yasaitis, “High-performance, tensile-strained Ge p-i-n photodetectors on a Si platform,” Appl. Phys. Lett. 87, 103501 (2005). [CrossRef]

4.

D. Ahn, C-Y Hong, J. Liu, W. Giziewicz, M. Beals, L. C. Kimerling, J. Michel, J. Chen, and F. X. Kärtner, “High performance, waveguide integrated Ge photodetectors,” Opt. Express 15, 3916–3921 (2007). [CrossRef] [PubMed]

5.

L. C. Kimerling, D. Ahn, A. B. Apsel, M. Beals, D. Carothers, Y-K. Chen, T. Conway, D. M. Gill, M. Grove, C-Y Hong, M. Lipson, J. Liu, J. Michel, D. Pan, S. S. Patel, A. T. Pomerene, M. Rasras, D. K. Sparacin, K-Y. Tu, A. E. White, and C. W. Wong, “Electronic-photonic integrated circuits on the CMOS platform,” Proc. SPIE 6125, 612502 (2006). [CrossRef]

6.

B. E. A. Saleh and M. C. Teich, Fundamentals of Photonics (P266, John Wiley & Sons, Inc., 1991). [CrossRef]

7.

H. A. Haus, Wave and Fields in Optoelectronics (P218, Prentice-Hall, Inc., Englewood Cliffs, NJ, 1984).

8.

D. K. Sparacin, R. Sun, A. Agarwal, M. Beals, J. Michel, L. C. Kimerling, T. Conway, A. Pomerene, D. Carothers, M. Grove, D. M. Gill, M. S. Rasras, S. S. Patel, and A. E. White, “Low-loss amorphous silicon channel waveguides for integrated photonics,” Proceedings of 3rd IEEE International Conference on Group IV Photonics, 255–257, 2006.

9.

M. Beals, J. Michel, J. Liu, D. Ahn, D. K. Sparacin, R. Sun, C-Y Hong, L. C. Kimerling, A. Pomerene, D. Carothers, J. Beattie, A. Kopa, A. Apsel, M. S. Rasras, D. M. Gill, S. S. Patel, K. Y. Tu, Y-K Chen, and A. E. White, “Process Flow Innovations for Photonic Device Integration in CMOS,” Proc. SPIE 6898, 689804 (2008). [CrossRef]

10.

Y. Shani, C. H. Henry, R. C. Kistler, R. F. Kazarinov, and K. J. Orlowsky, “Integrated optic adiabatic polarization splitter on silicon,” Appl. Phys. Lett. 56, 120 (1990). [CrossRef]

11.

A. Yariv and X. Sun, “Supermode Si/III-V hybrid lasers, optical amplifiers, and modulators: A proposal and analysis,” Opt. Express 15, 9147 (2007). [CrossRef] [PubMed]

12.

D. F. G. Gallagher and T. P. Felici, “Eigenmode expansion methods for simulation of optical propagation in photonics: Pros and cons,” Proc. SPIE 4987, 69–82 (2003). [CrossRef]

13.

M. R. Watts and H. A. Haus, “Integrated mode-evolution-based polarization rotators,” Opt. Lett. 29, 138 (2005). [CrossRef]

14.

N-N Feng, R. Sun, L. C. Kimerling, and J. Michel, “Lossless strip-to-slot waveguide transformer,” Opt. Lett. 32, 1250 (2007). [CrossRef] [PubMed]

15.

P. Karminow and L. W. Stulz, “Loss in cleaved Ti-diffused LiNbO3 waveguides,” Appl. Phys. Lett. 33, 62 (1978) [CrossRef]

16.

J. Liu, D. Pan, S. Jongthammanurak, D. Ahn, C-Y Hong, M. Beals, L. C. Kimerling, and J. Michel, “Waveguide-Integrated Ge p-i-n Photodetectors on SOI Platform,” 3rd IEEE International Conference on Group IV Photonics,2006, 173

OCIS Codes
(130.2790) Integrated optics : Guided waves
(230.7380) Optical devices : Waveguides, channeled

ToC Category:
Integrated Optics

History
Original Manuscript: May 13, 2008
Revised Manuscript: July 2, 2008
Manuscript Accepted: July 4, 2008
Published: July 21, 2008

Citation
Rong Sun, Mark Beals, Andrew Pomerene, Jing Cheng, Ching-yin Hong, Lionel Kimerling, and Jurgen Michel, "Impedance matching vertical optical waveguide couplers for dense high index contrast circuits," Opt. Express 16, 11682-11690 (2008)
http://www.opticsinfobase.org/oe/abstract.cfm?URI=oe-16-16-11682


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References

  1. R. Kirchain and L. C. Kimerling, "A roadmap for nanophotonics," Nature Photon. 1, 303-305 (2007). [CrossRef]
  2. Q. Xu, B. Schmidt, S. Pradhan, and M. Lipson, "Micrometre-scale silicon electro-optic modulator," Nature 435, 325-327 (2005). [CrossRef] [PubMed]
  3. J. Liu, J. Michel, W. Giziewicz, D. Pan, K. Wada, D. Cannon, L. C. Kimerling, J. Chen, F. O. Ilday, F. X. Kartner, and J. Yasaitis, "High-performance, tensile-strained Ge p-i-n photodetectors on a Si platform," Appl. Phys. Lett. 87, 103501 (2005). [CrossRef]
  4. D. Ahn, C-Y Hong, J. Liu, W. Giziewicz, M. Beals, L. C. Kimerling, J. Michel, J. Chen, and F. X. Kärtner, "High performance, waveguide integrated Ge photodetectors," Opt. Express 15, 3916-3921 (2007). [CrossRef] [PubMed]
  5. L. C. Kimerling, D. Ahn, A. B. Apsel, M. Beals, D. Carothers, Y-K. Chen, T. Conway, D. M. Gill, M. Grove, C-Y Hong, M. Lipson, J. Liu, J. Michel, D. Pan, S. S. Patel, A. T. Pomerene, M. Rasras, D. K. Sparacin, K-Y. Tu, A. E. White, and C. W. Wong, "Electronic-photonic integrated circuits on the CMOS platform," Proc. SPIE 6125, 612502 (2006). [CrossRef]
  6. B. E. A. Saleh and M. C. Teich, Fundamentals of Photonics (P266, John Wiley & Sons, Inc., 1991). [CrossRef]
  7. H. A. Haus, Wave and Fields in Optoelectronics (P218, Prentice-Hall, Inc., Englewood Cliffs, NJ, 1984).
  8. D. K. Sparacin, R. Sun, A. Agarwal, M. Beals, J. Michel, L. C. Kimerling, T. Conway, A. Pomerene, D. Carothers, M. Grove, D. M. Gill, M. S. Rasras, S. S. Patel, and A. E. White, "Low-loss amorphous silicon channel waveguides for integrated photonics," Proceedings of 3rd IEEE International Conference on Group IV Photonics, 255-257, 2006.
  9. M. Beals, J. Michel, J. Liu, D. Ahn, D. K. Sparacin, R. Sun, C-Y Hong, L. C. Kimerling, A. Pomerene, D. Carothers, J. Beattie, A. Kopa, A. Apsel, M. S. Rasras, D. M. Gill, S. S. Patel, K. Y. Tu, Y-K Chen, and A. E. White, "Process Flow Innovations for Photonic Device Integration in CMOS," Proc. SPIE 6898, 689804 (2008). [CrossRef]
  10. Y. Shani, C. H. Henry, R. C. Kistler, R. F. Kazarinov, and K. J. Orlowsky, "Integrated optic adiabatic polarization splitter on silicon," Appl. Phys. Lett. 56, 120 (1990). [CrossRef]
  11. A. Yariv and X. Sun, "Supermode Si/III-V hybrid lasers, optical amplifiers, and modulators: A proposal and analysis," Opt. Express 15, 9147 (2007). [CrossRef] [PubMed]
  12. D. F. G. Gallagher and T. P. Felici, "Eigenmode expansion methods for simulation of optical propagation in photonics: Pros and cons," Proc. SPIE 4987, 69-82 (2003). [CrossRef]
  13. M. R. Watts and H. A. Haus, "Integrated mode-evolution-based polarization rotators," Opt. Lett. 29, 138 (2005). [CrossRef]
  14. N-N Feng, R. Sun, L. C. Kimerling, and J. Michel, "Lossless strip-to-slot waveguide transformer," Opt. Lett. 32, 1250 (2007). [CrossRef] [PubMed]
  15. P. Karminow and L. W. Stulz, "Loss in cleaved Ti-diffused LiNbO3 waveguides," Appl. Phys. Lett. 33, 62 (1978) [CrossRef]
  16. J. Liu, D. Pan, S. Jongthammanurak, D. Ahn, C-Y Hong, M. Beals, L. C. Kimerling, and J. Michel, "Waveguide-Integrated Ge p-i-n Photodetectors on SOI Platform," 3rd IEEE International Conference on Group IV Photonics,2006, 173

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