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Optics Express

  • Editor: C. Martijn de Sterke
  • Vol. 16, Iss. 22 — Oct. 27, 2008
  • pp: 18264–18274
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Design of monolithically integrated vertical cavity laser with depleted optical thyristor for optical programmable gate array

Woon-Kyung Choi and Young-Wan Choi  »View Author Affiliations


Optics Express, Vol. 16, Issue 22, pp. 18264-18274 (2008)
http://dx.doi.org/10.1364/OE.16.018264


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Abstract

We have theoretically analyzed the depleted optical thyristor structure and experimentally demonstrated optical logic gates implemented by monolithically integrated vertical cavity laser – depleted optical thyristor (VCL-DOT) for an optically programmable gate array. The optical AND-and OR-gates have been realized by changing a input bias of the single VCL-DOTs and all kinds of optical logic functions are also implemented by adjusting an intensity of the reference input beams into the differential VCL-DOTs. To achieve the high sensitivity and low threshold current, a small active region of lasing part and a wide detecting area are simultaneously designed by using a selective oxidation process.

© 2008 Optical Society of America

1. Introduction

There has been increasing interest in photonic switching and optical computing that have the capability of two-dimensional arrays aiming at highly parallel optical information processing. However, with an increase in the number of interconnects, electronic circuits which control optical interconnect systems are very complicated and the ability of electronic circuits might limit the number of interconnects. To solve this problem and construct simple optical interconnect systems, functions are required for optical devices themselves. To achieve the requirement, photonic and optoelectronic devices based on a concept of a fusion of electronics and photonics in a device level, have been proposed and demonstrated. These devices such as light amplifying optical switch (LAOS)1–3, vertical-to-surface transmission electro-photonic devices (VSTEP)4,5, self-electrooptic effect device (SEED), and PnpN optical thyristor have several functions, such as light emission, light detection, optical switch, memory, and logical operation.6–9 The PnpN structure itself has also various advantages such as fast response, low switching energy, low power consumption, high on/off contrast, and expansibility to two-dimensional monolithic array.10–13 However, these reported devices have only basic Boolean functions such as AND, OR, and INVERT as well as a fixed logical functionality with complex electrical components and connections.

In this paper, we theoretically analyzed and experimentally demonstrated a monolithically integrated vertical cavity laser with depleted optical thyristor (VCL-DOT) structure. Moreover, many optical logic functions such as logical AND, OR operations, and invert functions such as NAND and NOR are demonstrated by using our simple operating techniques. The optical AND and OR gates have been experimentally realized by changing a input bias of the single VCL-DOTs and all kinds of optical logic functions are also implemented by only adjusting an intensity of the reference input beams into the differential VCL-DOTs.

2. Optical thyristor

2.1 Theoretical current-voltage characteristics

Basic equations for device analysis become rather complex when position-dependent bandgap discontinuity, avalanche breakdown, and optical carrier generation are included. Poisson’s equation and continuity equations are defined as

1εdεdxE(x)+dE(x)dx=qε(pn+NDNA),
(1)
nt=1qdJndx+GnUR,
(2)
pt=1qdJpdx+GpUR,
(3)

where ε is the electric permittivity, n and p are the electron and hole densities, and NA and ND are the number of ionized donors and acceptors. Several important physical mechanisms necessary to accurately model four-layer devices are included in the simulation. Recombination mechanisms include the Shockley-Read-Hall recombination model stated as:

U=pnni2τp(n+ni)+τn(p+ni),
(4)

where τn and τp are the electron and hole minority carrier life times, respectively. The impact ionisation mechanism is expressed as

G=1qαpJp+1qαnJn,
(5)

where the ionization coefficients are given by

αp,n=Ap,n·exp[(Bp,nE)m]
(6)

The poisson and continuity equations are solved for n, p, and E according to the currentcontrol-type formulation, where the numerical solution procedure and implementation presented in papers by Scharfetter and Gummel and Kurata14 on homojunction thyristors are applied.15

2.2 Basic operation principle

Fig. 1. (a) Cross-section of optical thyristor structure with external resistor (R) and (b) typical s-shaped current-voltage characteristic of optical thyristor.

An optical thyristor consisting of four layers is a bistable device with an s-shaped currentvoltage (I-V) characteristic as shown in Fig. 1. Here, the switching voltages (VS1, VS2, VS3) are the forward breakdown voltages, and IS is the switching current. In the on-state, the optical thyristor emits light as a laser. By increasing the input optical power, it is possible to vary the I-V curve from C1 to C3. Suppose two optical input signals are simultaneously injected into the thyristor. C1 is an original I-V curve, C3 is the I-V curve when two optical input signals are injected, and C2 is the I-V curve when only one is injected into the thyristor. When the driving voltage between VS2 and VS3 is applied to the optical thyristor, as shown in the load line L2, it should turn-on at only the C3 condition because the operating points (S2 and S2′) are in the off-state at C1 and C2 conditions and it is able to move to H1 in the on-state from the only C3 condition, thus providing a logical AND function. However, when the driving voltage is changed to the value between VS1 and VS2 like L1, it should turn-on at C2 and C3 conditions, thus providing a logical OR operation. In other words, this operating technique allows the optical thyristor to achieve both of the logical AND- and OR-gates by very simple adjustment of the external bias voltage.

Fig. 2. (a) Cross-section of differential optical thyristor structure and (b) timing diagram of the differential switching operation.

The device configuration of a PnpN differential optical switch is shown schematically in Fig. 2(a). Two PnpN optical switches, DOTA and DOTB, are connected in parallel and the driving voltage VD is applied to them through a load resistor R. Figure 2(b) shows the timing diagram of differential operating method. A differential pair consisting of two PnpN devices connected in parallel and having a common series resistance was shown by Hara et al.16 to be a much more sensitive optical switch than single devices. Firstly, the driving voltage (VD) slightly higher than the switching voltage (VS) is applied into two devices, when the rising edge of the electrical pulse overlaps the optical inputs. Suppose two light inputs simultaneously illuminate each PnpN switch. The higher input power, the more the carriers are generated in the gate layers, and reduce the switching voltage of the device. Thus, the switch with a higher input power is preferentially turned on. The current through it increases the voltage drop across the load resistor. As a result, the voltage applied to the switches drops rapidly; the switch with a lower input power cannot be turned on. Thus, we can obtain a differential optical switching for two light inputs. This is an optical triggering process of the differential DOTs. Thus differential switches, optical comparator, and several functional devices with very low optical input can be expected. This is very suitable for integrating an optical thyristor with electronic devices for optoelectronic integrated circuits and various applications such as optical logic systems.17–19

3. Design issues

3.1 PnpN cavity design

The VCL-DOT is composed of an optical switch and two high-reflectivity DBR mirrors separated by a thickness of a multiple of λ/2 apart (where λ is the wavelength of light in the semiconductor) to form a high-finesse Fabry-Perot cavity and the active layer should be located at the peak of the standing wave as shown in fig. 3. The optical thyristors should have nonlinear s-shaped I-V characteristics and sufficient switching voltage with about 5 V. We have decided the doping density with 2~3×1017 cm-1 in inner layer and 4~5×1018 cm-1 in outer layer, respectively. The doping level of two inner layers typically dominates a switching voltage of nonlinear I-V curve. The higher doping concentration in inner layers, the higher switching voltage is caused and very low doping density enables nonlinear characteristics of the optical thyristor to be disappeared. The doping concentration of two outer layers typically dominates a lasing efficiency. The higher doping level of outer layer, the more carriers are injected into the active region, the lasing efficiency is better. Very high doping concentration, however, deteriorate the lasing characteristics on the contrary, because lots of dopants cause re-absorption of photons generating from gain region.

Fig. 3. Refractive index profile and longitudinal electric field in the vicinity of the optical cavity within our desired VCL-DOT.

Fig. 4. Simulation results of I-V characteristics in our optimized optical thyristor cavity structure.

Table 1. Switching and holding voltages [V] and currents [µA/cm] as a function of inner and outer layer thickness

table-icon
View This Table

3.2 Selective oxide layer

Fig. 5. Schematic diagram of selectively oxidized VCL-DOT.

To achieve both of the higher sensitivity and lower threshold current, we have designed a small center region of lasing part as well as a wide detecting area as shown in Fig. 5. Using selective oxidation of a buried AlGaAs layer to define the laser aperture will produce low threshold current, because of reduced current spreading and elimination of leakage current through the side walls.22,23 This selectively oxidized laser also has a high sensitivity to optical input light, because it is transparent to the injected input light which is absorbed in whole active region. Moreover, to increase the efficiency of optical emission, three undoped multiple quantum well layers have been incorporated in the active region of the VCL-DOT. The active region also acts as an absorption region for optically switching the VCL-DOT. Although the active region is thin, the enhancement of absorption is expected because of multi-reflection between the two mirrors.

4. Results and discussions

4.1 Continuous wave(CW) laser operation

Fig. 6. Light-current(solid) and current-voltage(dotted) curves of a 2×2 µm VCL-DOT. The inset shows the top view of the fabricated device.
Fig. 7. Slope efficiency as varying the oxide aperture. The inset shows the single mode spectral response of VCL-DOT.

4.2 Basic characteristics of optical thyristors

Fig. 8. LIV curve of the VCL-DOT with an oxide aperture of 5×5 µm as a function of input light intensity.

4.3 Single VCL-DOT

Fig. 9. Demonstration of digital optical logic operations (a) OR and (b) AND using a VCLDOT. (c) Schematic equivalent circuit for single VCL-DOT.

4.4 Differential VCL-DOT

Fig. 10. Demonstration of digital optical logic operations (a) OR, (b) NOR, (c) AND, and (d) NAND using a differential VCL-DOT. The photograph contains seven traces showing the bias voltage, optical inputs A and B, and the optical output pulses, respectively. (e) Schematic equivalent circuit for differential VCL-DOT.

Figure 10 shows the input-output oscilloscope traces of the logical OR/NOR and AND/NAND functionalities based on the differential VCL-DOT switch, respectively. These all logical functions come from the same scheme just by changing a power of the reference input beam(R) as shown in Fig. 10(e). Two PnpN optical switches are connected in parallel with a load resistor of 50 Ω, a bias signal (top trace; 5.54 V amplitude; 1 µs duration) is applied into the parallel devices, two optical input signals (A plus B; forth traces; 308 µW DC power; 250 ns pulse width; 1.1 VP-P) into the DOTA and the reference input beam(R) into the other site (DOTB) are injected, while each vertical cavity laser output is collected by two Si photodetectors, respectively. Figure 10(a) and (b) show the oscilloscope traces demonstrating operation of the logical OR/NOR gates when the power of R is 392 µW. The DOTA shows the logical OR operation if the reference light power is slightly higher than DC floor level in A+B and lower than the power when just one of two operands in A and B is true. The DOTB, however, operates the NOR functionality as the inverter to the DOTA, because the higher the input power, the more the carriers are generated in the center layers, and reduce the switching voltage. Because the switching voltage of the one with a higher input power becomes lower than that of the other, the switch with a higher input power is preferentially turned on. In other words, the inverter based on the differential VCL-DOT compares the optical power of two input beams and raise up the winner’s arm. If the power of the reference input beam is changed to 457 µW without changing other conditions, it allows the differential VCL-DOT to operate the logical AND/NAND functions as shown in Fig. 10(c) and (d). It is because the reference beam power is higher than the power when just one of two operands in A and B is true and lower than the power when both of two operands are true. All the Boolean logic functions can be constructed by using only two basic logic functions, such as AND or OR, plus the INVERT function. Any logic function can be implemented by cascading different combinations of these simple gates. Consequently, all kinds of optical logic gates for an optical programmable gate array can be realized by our simple operation scheme to adjust the optical reference input power without complex electrical circuits and connections.

5. Conclusion

We have theoretically analyzed the monolithic integration of single and differential VCL-DOT structure and experimentally demonstrated optical logic gates such as AND-gate, OR-gate, and INVERTER implemented by VCL-DOT for an optical programmable gate array. Without complex electrical components and connections, the optical AND and OR gates were experimentally realized by changing a input bias of the single VCL-DOTs and all kinds of optical logic functions were also implemented by adjusting an intensity of the reference input beams into the differential VCL-DOTs. To achieve high slope efficiency in the overall current level, DBR mirrors were designed and as a result high slope efficiency of 0.43 mW/mA was obtained. We have designed a small active region of lasing part and a wide detecting area using a selective oxidation process for both of the higher sensitivity and lower threshold current. The lasing characteristics of a low threshold current with 0.65 mA, a high sidemode suppression ratio with larger than 40 dB, and an output spectrum at 854 nm are measured. We have shown logical operations with 133 ns input pulses and there is scope for reducing this time. The switching speed can be significantly improved by device scaling, optimization of the DOT structure’s design, and selection of the optimal bias conditions. Our experimental results suggest the potential applications of VCL-DOT in photonic switching, optical computing, optical interconnecting, and advanced optical communication systems.

Acknowledgment

This work was supported by the Postdoctoral Research Program of Chung-Ang University 2007 year.

References and links

1..

X. An, K. M. Geib, M. J. Hafich, L. M. Woods, S. A. Feld, F. R. Beyette, G. Y. Robinson, and C. W. Wilmsen, “Integrated optical NAND Gate,” Electron. Lett.28, 1545–1546 (1992). [CrossRef]

2..

F. R. Beyette, K. M. Geib, S. A. Feld, X. An, M. J. Hafich, G. Y. Robinson, and C. W. Wilmsen, “Integrated optical NOR Gate,” IEEE Photon. Technol. Lett. 4, 390–392 (1992). [CrossRef]

3..

F. R. Beyette, K. M. Geib, S. A. Feld, M. J. Hafich, X. An, G. Y. Robinson, and C. W. Wilmsen, “Optoelectronic Exclusive-OR (XOR) Gate,” IEEE Photon. Technol. Lett. 5, 686–688 (1993). [CrossRef]

4..

R. P. bryan, G. R. Olbright, and J. Cheng, “Cascadable surface-emitting laser logic: Demonstration of Boolean Logic,” Electron. Lett. 27, 893–894 (1991). [CrossRef]

5..

Y. Tashiro, N. Hamao, M. Sugimoto, N. Takado, S. Asada, and K. Kasahara, “Vertical to surface transmission electrophotonic device with selectable output light channels,” Appl. Phys. Lett. 54, 329–331 (1989). [CrossRef]

6..

K. Kasahara, Y. Tashiro, N. Hamao, M. Sugimoto, and T. Yanase, “Double heterostructure optoelectronic switch as a dynamic memory with low-power consumption,” Appl. Phys. Lett. 52, 679–681 (1988). [CrossRef]

7..

P. Zhou, J. Cheng, C. F. Schaus, S. Z. sun, C. Hains, E. Armour, D. R. Myers, and G. A. Vawter, “Inverting and latching optical logic gates based on the integration of vertical-cavity surface-emitting lasers and photothyristors,” IEEE Photon. Technol. Lett. 4, 157–159 (1992). [CrossRef]

8..

J. Pankove, C. Radehaus, and K. Wagner, “Winner-take-all neural net with memory,” Electron. Lett. 26, 349–350 (1990). [CrossRef]

9..

G. W. Taylor, D. L. Crawford, and J. G. Simmons, “Optoelectronic dynamic random access memory cell utilizing a three-terminal N-channel self-aligned double-heterostructure optoelectronic switch,” Appl. Phys. Lett. 54, 543–545 (1989). [CrossRef]

10..

A. G. Kirk, H. Thienpont, A. Goulet, P. Heremans, G. Borghs, R. Vounckx, and M. Kuijk, “Parallel optoelectronic data transcription with fan-out between planes of PnpN optical thyristors,” IEEE Photon. Technol. Lett. 8, 464–466 (1996). [CrossRef]

11..

K. Hara, K. Kojima, K. Mitsunaga, and K. Kyuma, “Optical flip-flop based on parallel-connected AlGaAs/GaAs PnpN structures,” Opt. Lett. 15, 749 (1990). [CrossRef] [PubMed]

12..

W. K. Chan, J. P. Harbison, A. C. von Lehmen, L. T. Florez, C. K. Nguyen, and S. A. Schwarz, “Optically controlled surface-emitting lasers,” Appl. Phys. Lett. 58, 2342–2344 (1991). [CrossRef]

13..

F. R. Beyette, K. M. Geib, S. A. Feld, M. J. Hafich, X. An, G. Y. Robinson, and C. W. Wilmsen, “Optoelectronic Exclusive-OR (XOR) gate,” IEEE Photon. Technol. Lett. 5, 464–466 (1996).

14..

M. Kurata, Numerical Analysis of Semiconductor Device (Lexington Books, Massachusetts1982).

15..

W. K. Choi, D. G. Kim, Y. W. Choi, S. Lee, D. H. Woo, and S. H. Kim, “AlGaAs/GaAs NpnP depleted optical thyristor using bottom mirror layers,” Jpn. J. Appl. Phys. 44, 2913–2920 (2005). [CrossRef]

16..

K. Hara, K. Kojima, K. Mitsunaga, and K. Kyuma, “Differential optical comparator using parallel connected AlGaAs PnpN optical switches,” Electron. Lett. 25, 433–434 (1989). [CrossRef]

17..

K. Ayadi, G. Bickel, M. Kuijk, P. Heremans, G. Borghs, and R. Vounckx, “A hybridized optical thyristor —CMOS receiver for optoelectronic applications,” IEEE Photon. Technol. Lett. 9, 669–671 (1997). [CrossRef]

18..

A. G. Kirk, H. Thienpont, A. Goulet, P. Heremans, G. Borghs, R. Vounckx, M. Kuijk, and I. Veretennicoff, “Demonstration of optoelectronic logic operations with differential pairs of optical thyristors,” IEEE Photon. Technol. Lett. 8, 467–469 (1996). [CrossRef]

19..

K. Hara, K. Kojima, K. Mitsunaga, and K. Kyuma, “AlGaAs-GaAs PnpN differential optical switch,” IEEE J. Quantum Electron. 28, 1335–1342 (1992). [CrossRef]

20..

J. J. Lee, D. G. Kim, J. K. Choi, Y. W. Choi, S. Y. Han, S. B. Lee, S. H. Kim, Y. Nakano, and N. Futakuchi, “Performance analysis of waveguide-type InGaAsP/InP fully-depleted optical thyristors for optical communication system,” in Proc. SPIE 3944, 926 (2000). [CrossRef]

21..

W. K. Choi, D. G. Kim, Y. W. Choi, S. Lee, D. H. Woo, Y. T. Byun, J. H. Kim, and S. H. Kim, “Reverse-biased characteristics of GaAs/AlGaAs depleted optical thyristor with low depletion voltage,” in Proc. SPIE 4986, 180 (2003). [CrossRef]

22..

K. D. Choquette, K. L. Lear, R. P. Schneider, K. M. Geib, J. J. Figiel, and R. Hull, “Fabrication and performance of selectively oxidized vertical-cavity lasers,” IEEE Photon. Technol. Lett. 7, 1237–1239 (1995). [CrossRef]

23..

K. D. Choquette, R. P. Schneider, K. L. Lear, and K. M. Geib, “Low threshold voltage vertical-cavity lasers fabricated by selective oxidation,” Electeon. Lett. 30, 2043 (1994). [CrossRef]

24..

W. K. Choi, D. G. Kim, D. Choquette, Y. K. Kim, S. Lee, D. H. Woo, and Y. W. Choi, “Optical properties of selectively oxidized vertical cavity laser with depleted optical thyristor structure,” Appl. Phys. Lett. 89, 121117 (2006). [CrossRef]

25..

W. K. Choi, D. G. Kim, D. G. Kim, K. D. Choquette, S. Lee, D. H. Woo, and Y. W. Choi, “Optical AND/OR gates based on monolithically integrated vertical cavity laser with depleted optical thyristor structure,” Opt. Express 14, 11833–11838 (2006). [CrossRef] [PubMed]

26..

K. Hara, K. Kojima, K. Mitsunaga, and K. Kyuma, “AlGaAs/GaAs PnpN differential optical switch operable with 400 fJ optical input energy,” Appl. Phys. Lett. 57, 1075–1077 (1990). [CrossRef]

27..

M. Kuijk, P. Heremans, and G. Borghs, “Highly sensitive NpnP optoelectronic switch by AlAs regrowth,” Appl. Phys. Lett. 59, 497 (1991). [CrossRef]

28..

B. Lu, P. Zhou, Y. Lu, J. Cheng, R. E. Leibenguth, A. C. Adams, J. L. Zilko, K. L. Lear, J. C. Zolper, S. A. Chalmers, and G. A. Vawter, “Binary optical switch and programmable optical logic gate based on the integration of GaAs/AlGaAs surface-emitting lasers and heterojunction phototransistors,” IEEE Photon. Technol. Lett. 6, 398–401 (1994). [CrossRef]

29..

F. R. Beyette, X. An, K. M. Geib, S. A. Feld, M. J. Hafich, G. Y. Robinson, and C. W. Wilmsen, “XOR based on an InP/InGaAs light amplifying optical switch (LAOS),” Proc. Indium Phosphide and Related Materials 1, 584–587 (1993).

30..

P. Zhou, J. Cheng, C. F. Schaus, S. Z. Sun, C. Hains, K. Zheng, E. Armour, W. Hsin, D. R. Myers, and G. A. Vawter , “Cascadable, latching photonic switch with high optical gain by the monolithic integration of a vertical-cavity surface-emitting laser and a pn-pn photothyristor,” IEEE Photon. Technol. Lett. 3, 1009–1012 (1991). [CrossRef]

OCIS Codes
(200.3760) Optics in computing : Logic-based optical processing
(230.1150) Optical devices : All-optical devices

ToC Category:
Optics in computing

History
Original Manuscript: July 10, 2008
Revised Manuscript: October 14, 2008
Manuscript Accepted: October 16, 2008
Published: October 23, 2008

Citation
Woon-Kyung Choi and Young-Wan Choi, "Design of monolithically integrated vertical cavity laser with depleted optical thyristor for optical programmable gate array," Opt. Express 16, 18264-18274 (2008)
http://www.opticsinfobase.org/oe/abstract.cfm?URI=oe-16-22-18264


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References

  1. X. An, K. M. Geib, M. J. Hafich, L. M. Woods, S. A. Feld, F. R. Beyette, Jr., G. Y. Robinson, and C. W. Wilmsen, "Integrated optical NAND Gate," Electron. Lett. 28, 1545-1546 (1992). [CrossRef]
  2. F. R. Beyette, Jr., K. M. Geib, S. A. Feld, X. An, M. J. Hafich, G. Y. Robinson, and C. W. Wilmsen, "Integrated optical NOR Gate," IEEE Photon. Technol. Lett. 4, 390-392 (1992). [CrossRef]
  3. F. R. Beyette, Jr., K. M. Geib, S. A. Feld, M. J. Hafich, X. An, G. Y. Robinson, and C. W. Wilmsen, "Optoelectronic Exclusive-OR (XOR) Gate," IEEE Photon. Technol. Lett. 5, 686-688 (1993). [CrossRef]
  4. R. P. Bryan, G. R. Olbright, and J. Cheng, "Cascadable surface-emitting laser logic: Demonstration of Boolean Logic," Electron. Lett. 27, 893-894 (1991). [CrossRef]
  5. Y. Tashiro, N. Hamao, M. Sugimoto, N. Takado, S. Asada, and K. Kasahara, "Vertical to surface transmission electrophotonic device with selectable output light channels," Appl. Phys. Lett. 54, 329-331 (1989). [CrossRef]
  6. K. Kasahara, Y. Tashiro, N. Hamao, M. Sugimoto, and T. Yanase, "Double heterostructure optoelectronic switch as a dynamic memory with low-power consumption," Appl. Phys. Lett. 52, 679-681 (1988). [CrossRef]
  7. P. Zhou, J. Cheng, C. F. Schaus, S. Z. sun, C. Hains, E. Armour, D. R. Myers, and G. A. Vawter, "Inverting and latching optical logic gates based on the integration of vertical-cavity surface-emitting lasers and photothyristors," IEEE Photon. Technol. Lett. 4, 157-159 (1992). [CrossRef]
  8. J. Pankove, C. Radehaus, K. Wagner, "Winner-take-all neural net with memory," Electron. Lett. 26, 349-350 (1990). [CrossRef]
  9. G. W. Taylor, D. L. Crawford, and J. G. Simmons, "Optoelectronic dynamic random access memory cell utilizing a three-terminal N-channel self-aligned double-heterostructure optoelectronic switch," Appl. Phys. Lett. 54, 543-545 (1989). [CrossRef]
  10. A. G. Kirk, H. Thienpont, A. Goulet, P. Heremans, G. Borghs, R. Vounckx, M. Kuijk, "Parallel optoelectronic data transcription with fan-out between planes of PnpN optical thyristors," IEEE Photon. Technol. Lett. 8, 464-466 (1996). [CrossRef]
  11. K. Hara, K. Kojima, K. Mitsunaga, and K. Kyuma, "Optical flip-flop based on parallel-connected AlGaAs/GaAs PnpN structures," Opt. Lett. 15, 749 (1990). [CrossRef] [PubMed]
  12. W. K. Chan, J. P. Harbison, A. C. von Lehmen, L. T. Florez, C. K. Nguyen, and S. A. Schwarz, "Optically controlled surface-emitting lasers," Appl. Phys. Lett. 58, 2342-2344 (1991). [CrossRef]
  13. F. R. BeyetteJr., K. M. Geib, S. A. Feld, M. J. Hafich, X. An, G. Y. Robinson, and C. W. Wilmsen, "Optoelectronic Exclusive-OR (XOR) gate," IEEE Photon. Technol. Lett. 5, 464-466 (1996).
  14. M. Kurata, Numerical Analysis of Semiconductor Device (Lexington Books, Massachusetts 1982).
  15. W. K. Choi, D. G. Kim, Y. W. Choi, S. Lee, D. H. Woo, and S. H. Kim, "AlGaAs/GaAs NpnP depleted optical thyristor using bottom mirror layers," Jpn. J. Appl. Phys. 44, 2913-2920 (2005). [CrossRef]
  16. K. Hara, K. Kojima, K. Mitsunaga, and K. Kyuma, "Differential optical comparator using parallel connected AlGaAs PnpN optical switches," Electron. Lett. 25, 433-434 (1989). [CrossRef]
  17. K. Ayadi, G. Bickel, M. Kuijk, P. Heremans, G. Borghs, and R. Vounckx, "A hybridized optical thyristor - CMOS receiver for optoelectronic applications," IEEE Photon. Technol. Lett. 9, 669-671 (1997). [CrossRef]
  18. A. G. Kirk, H. Thienpont, A. Goulet, P. Heremans, G. Borghs, R. Vounckx, M. Kuijk, and I. Veretennicoff, "Demonstration of optoelectronic logic operations with differential pairs of optical thyristors," IEEE Photon. Technol. Lett. 8, 467-469 (1996). [CrossRef]
  19. K. Hara, K. Kojima, K. Mitsunaga, and K. Kyuma, "AlGaAs-GaAs PnpN differential optical switch," IEEE J. Quantum Electron. 28, 1335-1342 (1992). [CrossRef]
  20. J. J. Lee, D. G. Kim, J. K. Choi, Y. W. Choi, S. Y. Han, S. B. Lee, S. H. Kim, Y. Nakano, and N. Futakuchi, "Performance analysis of waveguide-type InGaAsP/InP fully-depleted optical thyristors for optical communication system," Proc. SPIE 3944, 926 (2000). [CrossRef]
  21. W. K. Choi, D. G. Kim, Y. W. Choi, S. Lee, D. H. Woo, Y. T. Byun, J. H. Kim, and S. H. Kim, "Reverse-biased characteristics of GaAs/AlGaAs depleted optical thyristor with low depletion voltage," Proc. SPIE 4986, 180 (2003). [CrossRef]
  22. K. D. Choquette, K. L. Lear, R. P. Schneider, K. M. Geib, J. J. Figiel, and R. Hull, "Fabrication and performance of selectively oxidized vertical-cavity lasers," IEEE Photon. Technol. Lett. 7, 1237-1239 (1995). [CrossRef]
  23. K. D. Choquette, R. P. SchneiderJr., K. L. Lear, and K. M. Geib, "Low threshold voltage vertical-cavity lasers fabricated by selective oxidation," Electron. Lett. 30, 2043 (1994). [CrossRef]
  24. W. K. Choi, D. G. Kim, KentD. Choquette, Y. K. Kim, S. Lee, D. H. Woo, and Y. W. Choi, "Optical properties of selectively oxidized vertical cavity laser with depleted optical thyristor structure," Appl. Phys. Lett. 89, 121117 (2006). [CrossRef]
  25. W. K. Choi, D. G. Kim, D. G. Kim, K. D. Choquette, S. Lee, D. H. Woo, and Y. W. Choi, "Optical AND/OR gates based on monolithically integrated vertical cavity laser with depleted optical thyristor structure," Opt. Express 14, 11833-11838 (2006). [CrossRef] [PubMed]
  26. K. Hara, K. Kojima, K. Mitsunaga, and K. Kyuma, "AlGaAs/GaAs PnpN differential optical switch operable with 400 fJ optical input energy," Appl. Phys. Lett. 57, 1075-1077 (1990). [CrossRef]
  27. M. Kuijk, P. Heremans, and G. Borghs, "Highly sensitive NpnP optoelectronic switch by AlAs regrowth," Appl. Phys. Lett. 59, 497 (1991). [CrossRef]
  28. B. Lu, P. Zhou, Y. Lu, J. Cheng, R. E. Leibenguth, A. C. Adams, J. L. Zilko, K. L. Lear, J. C. Zolper, S. A. Chalmers, and G. A. Vawter, "Binary optical switch and programmable optical logic gate based on the integration of GaAs/AlGaAs surface-emitting lasers and heterojunction phototransistors," IEEE Photon. Technol. Lett. 6, 398-401 (1994). [CrossRef]
  29. F. R. BeyetteJr., X. An, K. M. Geib, S. A. Feld, M. J. Hafich, G. Y. Robinson, and C. W. Wilmsen, "XOR based on an InP/InGaAs light amplifying optical switch (LAOS)," Proc. Indium Phosphide and Related Materials 1, 584-587 (1993).
  30. P. Zhou, J. Cheng, C. F. Schaus, S. Z. Sun, C. Hains, K. Zheng, E. Armour, W. Hsin, D. R. Myers, and G. A. Vawter, "Cascadable, latching photonic switch with high optical gain by the monolithic integration of a vertical-cavity surface-emitting laser and a pn-pn photothyristor," IEEE Photon. Technol. Lett. 3, 1009-1012 (1991). [CrossRef]

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