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Optics Express

Optics Express

  • Editor: C. Martijn de Sterke
  • Vol. 18, Iss. 24 — Nov. 22, 2010
  • pp: 25061–25067
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Low-loss strip-loaded slot waveguides in Silicon-on-Insulator

Ran Ding, Tom Baehr-Jones, Woo-Joong Kim, Xugang Xiong, Richard Bojko, Jean-Marc Fedeli, Maryse Fournier, and Michael Hochberg  »View Author Affiliations


Optics Express, Vol. 18, Issue 24, pp. 25061-25067 (2010)
http://dx.doi.org/10.1364/OE.18.025061


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Abstract

Electro-optic polymer-clad silicon slot waveguides have recently been used to build a new class of modulators, that exhibit very high bandwidths and extremely low drive voltages. A key step towards making these devices practical will be lowering optical insertion losses. We report on the first measurements of low-loss waveguides that are geometrically suitable for high bandwidth slot waveguide modulators: a strip-loaded slot waveguide. Waveguide loss for undoped waveguides of 6.5 ± 0.2 dB/cm was achieved with 40 nm thick strip-loading, with the full silicon thickness around 220 nm and a slot size of 200 nm, for wavelengths near 1550 nm.

© 2010 OSA

1. Introduction

A slot waveguide consists of two ridges of high index material, such as silicon, narrowly separated from each other by a fully-etched trench, which is to be filled with a lower index material. The fundamental TE optical mode tends to be highly concentrated in the void region between the two ridges due to the dielectric discontinuity [1

1. V. R. Almeida, Q. F. Xu, C. A. Barrios, and M. Lipson, “Guiding and confining light in void nanostructure,” Opt. Lett. 29(11), 1209–1211 (2004). [CrossRef] [PubMed]

]. The narrow spacing of the dielectric arms and high field concentration provide fundamental advantages for building electro-optic modulators based on slot waveguide geometries [2

2. M. Hochberg, T. Baehr-Jones, G. Wang, J. Huang, P. Sullivan, L. Dalton, and A. Scherer, “Towards a millivolt optical modulator with nano-slot waveguides,” Opt. Express 15(13), 8401–8410 (2007). [CrossRef] [PubMed]

4

4. L. Alloatti, D. Korn, D. Hillerkuss, T. Vallaitis, J. Li, R. Bonk, R. Palmer, T. Schellinger, C. Koos, W. Freude, J. Leuthold, A. Barklund, R. Dinu, J. Wieland, M. Fournier, J. Fedeli, W. Bogaerts, P. Dumon, and R. Baets, “Silicon High-Speed Electro-Optic Modulator,” in Proceedings of Group IV Photonics, (Academic, Beijing, China, 2010), ThC2.

].

The very first nonlinear polymer-clad silicon slot waveguide Mach-Zehnder modulator reported already achieved a half wave voltage of 0.25V [5

5. T. Baehr-Jones, B. Penkov, J. Huang, P. Sullivan, J. Davies, J. Takayesu, J. Luo, T. D. Kim, L. Dalton, A. Jen, M. Hochberg, and A. Scherer, “Nonlinear polymer-clad silicon slot waveguide modulator with a half wave voltage of 0.25 V,” Appl. Phys. Lett. 92(16), 163303 (2008). [CrossRef]

], though at slow speeds. To achieve high-bandwidth modulation, low-resistance electrical contact between the slot arms and the driving electrodes must be made. In the 0.25V result [6

6. G. Wang, T. Baehr-Jones, M. Hochberg, and A. Scherer, “Design and fabrication of segmented, slotted waveguides for electro-optic modulation,” Appl. Phys. Lett. 91(14), 143109 (2007). [CrossRef]

], a series of fully etched contacting arms were used to achieve electrical contact between the slot waveguide and the driving electrodes in a 110 nm thick silicon layer. One problem with this approach was that the contact arms were extremely small, which required electron-beam lithography to fabricate., Also, as will be discussed later, large surface areas exposed to an etching process are likely to have surface-state based electrical conductivity problems. Another approach has been to use photonic crystals to constrain the mode laterally, which shows significant promise [7

7. J. H. Wülbern, J. Hampe, A. Petrov, M. Eich, J. Luo, A. K.-Y. Jen, A. Di Falco, T. F. Krauss, and J. Bruns, “Electro-optic modulation in slotted resonant photonic crystal heterostructures,” Appl. Phys. Lett. 94(24), 241107 (2009). [CrossRef]

].

In this paper, we fabricate and characterize strip-loaded slot waveguides [8

8. C. Koos, J. Brosi, M. Waldow, W. Freude, and J. Leuthold, “Silicon-on-insulator modulators for next-generation 100 Gbit/s-Ethernet”, Proc. 33th European Conf. Opt. Commun, (Academic, Berlin, Germany, 2007), Paper P056.

,9

9. J. Leuthold, W. Freude, J.-M. Brosi, R. Baets, P. Dumon, I. Biaggio, M. L. Scimeca, F. Diederich, B. Frank, and C. Koos, “Silicon Organic Hybrid Technology-A Platform for Practical Nonlinear Optics,” Proc. IEEE 97(7), 1304–1316 (2009). [CrossRef]

] with an un-etched silicon layer of ~220 nm and strip-loading thicknesses ranging from 40 to 70 nm. The resultant waveguide dimensions make it suitable to fabricate these waveguide through a photolithography-based CMOS compatible process. In the following sections, we will first discuss the waveguide designs, then present fabrication and metrology details, followed by measurement results. These are, to our knowledge, the first measurements of the waveguide loss of strip-loaded slot waveguides in silicon.

2. Strip-load waveguide design constraints and figures of merit

The strip-loaded silicon slot waveguide consists of two silicon arms (un-etched silicon) each with a wide strip-loading region (partially etched silicon), as shown in Fig. 1
Fig. 1 (a) Geometry of strip-loaded slot waveguide. The waveguide has a 200 nm width slot and 230 nm width arm, the silicon height is 220 nm while the strip-loading is 60 nm thick. The mode is calculated with ncladding = 1.5, and the |Ex| component of TE0 mode is overlaid with the geometry; (b) SEM micrograph of the cross-section of a fabricated waveguide.
. Electrical contact could then be made by putting metal electrodes on top of the strip-loading at a clearance from the waveguide once the silicon strip-loading is doped. However, the measurements we present here are for undoped, uncontacted strip-loaded slot waveguides. The losses we demonstrate here are likely to be useful starting points for further engineering efforts involving these waveguides.

We chose the thickness of un-etched silicon to be 220 nm because making the silicon too thin makes strip-loading design difficult, while making it too thick makes the waveguide multimode; 220 nm thickness is a good intermediate value that is both single-mode, and supports strip-loading thicknesses of reasonable height. In addition to the thickness of the un-etched silicon layer, there are a number of parameters that define each waveguide. Probably the most important parameter is the width of the slot: a narrower slot will lead to lower drive voltages [2

2. M. Hochberg, T. Baehr-Jones, G. Wang, J. Huang, P. Sullivan, L. Dalton, and A. Scherer, “Towards a millivolt optical modulator with nano-slot waveguides,” Opt. Express 15(13), 8401–8410 (2007). [CrossRef] [PubMed]

], but will also be harder to fabricate. In several commonly used processes, for example, slots must be at least 200 nm in size for guaranteed yield [10

10. ePIXFab Technology Paper, “LETI_05 Flex process” (2010). http://www.epixfab.eu/uploads/media/LETI_05_technical_flex.pdf

]. The thickness of the strip-loading region is an important consideration, as it (combined with the doping that will need to be done when building an electro-optic modulator upon waveguide) will determine the electrical resistance. Highly doped silicon can cause increased waveguide loss [11

11. R. A. Soref and B. R. Bennett, “Electrooptical effects in silicon,” IEEE J. Quantum Electron. 23(1), 123–129 (1987). [CrossRef]

], therefore, to achieve a given amount conductivity, making the strip-loading thicker and use lower doping concentration is desirable However, the waveguide design becomes more challenging in the presence of thicker strip-loading.

Surface-state based depletion is also anticipated, which makes the effective height of the strip-loading for current flow less than its physical height. For a surface terminated by a chemical oxide, the surface state density is about 1012 cm−2 [12

12. H. F. Okorn-Schmidt, “Characterization of silicon surface preparation processes for advanced gate dielectrics,” IBM J. Res. Develop. 43(3), 351–365 (1999). [CrossRef]

]. These surface states will “pin” the Fermi-level near the center of the band [13

13. S. M. Sze, and K. K. Ng, Physics of Semiconductor Devices 3rd edition, (Wiley-Interscience, 2006), Chap. 3.

]. It should be noted that the surface states would cause more severe depletion in segmented slot waveguide, due to much larger etched surface in the segments region.

In the case of an un-etched silicon thickness of 220 nm, based on simulations we predict 80 nm to be the maximum thickness that allows reliable strip-loaded slot waveguides to be built; thicker silicon would result in the TE0 mode being cut-off. We use strip-loading thicknesses of 40 nm to 70 nm to be conservative. With an eventual doping concentration of 1018 /cm3, the surface state depletion would be 10 nm, extending for only a fraction of the strip-loading height. Based on this, we predict that this strip-load thickness will be compatible with future high-bandwidth strip-loaded slot waveguide based modulators. Incidentally, we are presuming that the surface state concentration on the silicon to bottom-oxide interface is negligible.

3. Fabrication and measurement

The fabrication of the slot waveguides was done on Silicon-On-Insulator (SOI) wafers with two self-aligned photolithography steps on a 193 nm stepper and two Si dry etching steps. The SOI wafers have a 220 nm thick silicon layer, and a 2 µm thick buried oxide layer. The process started with a hardmask of 80 nm High Temperature Oxide (HTO) layer on top of the silicon layer [Fig. 3(a)
Fig. 3 Process flow: (a) start with 80 nm HTO on top of SOI; (b) 1st photolithography patterns the waveguide arms; (c) 1st dry etching etches through the hardmask and partially remove silicon, ellipsometry measurement after this step; (d) 2nd photolithography patterns the strip-loading; (e) 2nd dry etching removes silicon inside the slot and cut strip-loading; (f) thermal oxide smoothes the sidewall; (g) strip the remaining hardmask and the thermal oxide, CDSEM after this step; (h) final oxidation serves as passivation. The final step of the PMMA spin-coating is not shown.
]. First, the waveguide arms/slot were patterned [Fig. 3(b)]. In this photolithography step, we varied the exposure doses to account for etch bias of the slot. After that, an RIE silica etch with C4F8 was used to remove the hardmask. The quality of the edges is given by the resist roughness and by the recipe of the hard mask etching. The silicon exposed was then partially etched with HBr gases and the remaining thickness of silicon was measured by ellipsometry. As an example, Fig. 3(c) shows that a 70 nm silicon is left in the etched area, which will finally lead to ~60nm strip-loading.

In the second lithography step, the remaining hardmask served as a self-alignment, so that the resist to slot overlay became non-critical [Fig. 3(d)]. Then a full silicon etch removed the remaining silicon inside the slot and cut the strip-loading so that each waveguide is electrically and optically isolated [Fig. 3(e)]. A 10 nm thin thermal oxide, consuming 4.4 nm silicon [17

17. S. Wolf, and R. N. Tauber, Silicon Processing for VLSI Era Volume 1 – Processing Technology 2nd edition, (Lattice Press, 2000), Chap. 8.

], was then employed to smooth the waveguide sidewalls [Fig. 3(f)]. The remaining hardmask and the thin oxide were removed by a 30 nm SiO2 chemical etch [Fig. 3(g)]. After the thin oxide was removed, CDSEM measurements were taken at various sites to determine the actual dimensions of the slots and arms for three different exposure doses in the 1st photolithography step, which were 17.8 mJ/cm2, 19.0 mJ/cm2 and 20.2 mJ/cm2. Finally, another thermal oxidation was done for the purpose of passivation [Fig. 3(h)] which should yield 10 nm oxide and consume another 4.4 nm silicon. The final strip-loading would therefore be 60 nm. With this process, we actually fabricated waveguide with 40nm, 60nm and 70nm strip-loading.

Finally, in order to closely match the expected eventual index of the electro-optic polymers that will be used for actual modulators, we coated the chips in polymethyl methacrylate (PMMA) (MicroChem 950PMMA A 11% solids in Anisole), which has index close to 1.49 and low optical losses on the order of 0.2 dB/cm [18

18. H. Ma, A. K.-Y. Jen, and L. R. Dalton, “Polymer-based optical waveguides: Materials, processing, and Devices,” Adv. Mater. (Deerfield Beach Fla.) 14(19), 1339–1365 (2002). [CrossRef]

]. A spin-coating was used, typically with spin speed 2000 rpm for 45 seconds, and a bake time of 90 seconds at 180 °C, which should have resulted in a film thickness of the PMMA of 3 μm [19

19. MicroChem NANOTM PMMA and Copolymer datasheet. http://www.microchem.com/products/pdf/PMMA_Data_Sheet.pdf

].

To study the waveguide loss, we put five waveguide runouts with lengths ranging from ~1 mm to ~8 mm. on each chip. A diagram of the runout structure geometry is shown in Fig. 4(a)
Fig. 4 (a) Optical micrograph showing the layout of a group of strip-loaded slot waveguide runouts of different lengths; (b) SEM micrograph showing the stack of waveguide, buried-oxide layer and silicon subsrate; (c) SEM micrograph of the ridge waveguide to strip-loaded slot waveguide transition region.
. Coupling onto the chip is achieved by a series of grating couplers [20

20. D. Taillaert, W. Bogaerts, P. Bienstman, T. F. Krauss, P. Van Daele, I. Moerman, S. Verstuyft, K. De Mesel, and R. Baets, “An out-of-plane grating coupling for efficient butt-coupling between compact planar waveguides and single-mode fibers,” IEEE J. Quantum Electron. 38(7), 949–955 (2002). [CrossRef]

], which had typical 3 dB bandwidths of 35 nm, and a typical insertion loss of 9 dB per coupler. A short section of single-mode ridge waveguide was used to lead the light to the strip-loaded slot waveguide; the coupling between ridge and the strip-loaded slot was achieved with butt-coupler, with losses predicted by FDTD [21] of 3 dB. A y-junction is present to allow on-chip mixing for an unrelated experiment. According to FDTD simulations, the y-junction introduces 3.6 dB insertion losses to the runouts. Because each runout structure is identical in all respects, except for the length of the slot waveguide, the losses due to the grating couplers, butt-couplers and y-junctions should not affect our measurements of slot waveguide loss. In order to get similar performances for the grating couplers, these waveguide runouts are compactly laid out, so that they take up only a small fraction of the chip and thereby minimize a possible fabrication non-uniformity .

Devices were measured with a fiber-coupled Agilent 81980A laser and 81636B detector. Spectra were taken using the built-in sweeping ability of the laser. The laser power used was 6dBm except as noted elsewhere. Typical fiber-to-fiber insertion losses for the entire testing system, including all fiber wiring, the fiber array, and the integrated optical devices under test were around 35 to 45 dB, which gave us a signal-to-noise ratio of at least 20 dB. On each chip, we tested the five waveguide runouts and fit the spectrum to a quadratic function using the data points near the peak transmission wavelength (the interval was a 40 nm region centered where the wavelength where the optical output signal is at its maximum). Then a regression is employed to fit the peak transmission value extracted from the fitted quadratic function against the waveguide lengths, where we can get waveguide loss in dB per length from the slope of the linear fitting. The linear regression and associated uncertainties in the fitted parameters were computed using standard statistical techniques [22

22. W. H. Press, B. P. Flannery, S. A. Teukolsky, and W. T. Vetterling, Numerical Recipes in C: The Art of Scientific Computing 2nd edition, (Cambridge University Press, 1992), Chap. 15.

].

Figure 5
Fig. 5 Linear regression of peak output optical power vs. waveguide lengths for (a) chip 1 and (b) for chip 4; Spectrum and quadratic function fitting (the fitting used the data of only a section of the spectrum that centers at the peak response wavelength and span 40 nm): (c) chip1 and (d) chip4. The cladding material refarctive index is ~1.5.
shows example fittings of the spectrum and the linear regressions for two chips we tested. We attribute the slight fluctuations seen on the transmission spectrum to be the results of back-reflections from the grating couplers, the y-junction and the ridge to slot-waveguide butt-coupler. As is evidenced in the low uncertainty of our results, these fluctuations do not impair our ability to measure the waveguide loss of the strip-loaded slot waveguides.

Data from chips with strip-loading of 40 nm, 60 nm and 70 nm are listed in Table 1

Table 1. Summary of waveguide loss and sample information

table-icon
View This Table
. The final strip-loading thickness is estimated by subtracting 8.8 nm from the ellipsometry measurement, which was done on silicon strip-loading before the two successive 10 nm oxidation. The final slot width is estimated by subtracting 8.8 nm from the CDSEM measurement considering that during the following final 10 nm passivation oxidation the slot was effectively widened by 4.4 nm towards both sides. For the chips that were not covered in CDSEM, we did linear interpolation with the slot width versus photolithography dose data points. It should be noted that the maximum deviation in the slot size from 200 nm - 186.4 nm - is not different enough to cause a significant change in mode size or other parameters.

For the same strip-loading thickness the data from chips that have different exposure doses in the 1st photolithography step are also presented in the first two cases. No appreciable nonlinear loss was observed in a control experiment where we varied the laser power from −1 dBm to 6 dBm. It is striking to note that the 40 nm thick strip-loaded waveguides show statistically significantly lower waveguide loss than the waveguides with thicker strip-loading, even when the optical doses are identical. We believe it is likely that thinner strip-loading causes a more confined optical mode–since there is less overlap with the partially etched silicon, lower losses are observed.

4. Conclusions

We have experimentally demonstrated low loss strip-loaded slot waveguides with photolithography in SOI. The waveguides that we present data for have not been doped or contacted. With low-optical losses, and a relatively thick silicon strip-loading, high bandwidth slot-waveguide electro-optic polymer modulators can be built [16

16. R. Ding, T. Baehr-Jones, Y. Liu, R. Bojko, J. Witzens, S. Huang, J. Luo, S. Benight, P. Sullivan, J.-M. Fedeli, M. Fournier, L. Dalton, A. Jen, and M. Hochberg, “Demonstration of a low V π L modulator with GHz bandwidth based on electro-optic polymer-clad silicon slot waveguides,” Opt. Express 18(15), 15618–15623 (2010). [CrossRef] [PubMed]

]. We also show elsewhere that with this type of waveguide and proper transmission line design, high-speed low drive-voltage electro-optic modulators with lengths approaching a centimeter and bandwidths of 20 GHz or more can be built [23

23. J. Witzens, T. Baehr-Jones, and M. Hochberg, “Design of transmission line driven slot waveguide Mach-Zehnder interferometers and application to analog optical links,” Opt. Express 18(16), 16902–16928 (2010). [CrossRef] [PubMed]

]. We believe this is an important step towards realizing practical slot-waveguide polymer devices. We have also found that making a thinner strip-loading section appears to lead to lower losses. Future slot-waveguide modulator designs will likely need to trade optical loss against electrical performance to determine the optimal strip-loading thickness and doping concentrations.

Acknowledgments

The authors would like to thank Gernot Pomrenke, of the Air Force Office of Scientific Research, for his support through an AFOSR Young Investigators Program Grant, FA9550-08-1-0101, and would like to acknowledge support from the National Science Foundation (NSF) STC MDITR Center, DMR0120967 and the Washington Research Foundation.

References and links

1.

V. R. Almeida, Q. F. Xu, C. A. Barrios, and M. Lipson, “Guiding and confining light in void nanostructure,” Opt. Lett. 29(11), 1209–1211 (2004). [CrossRef] [PubMed]

2.

M. Hochberg, T. Baehr-Jones, G. Wang, J. Huang, P. Sullivan, L. Dalton, and A. Scherer, “Towards a millivolt optical modulator with nano-slot waveguides,” Opt. Express 15(13), 8401–8410 (2007). [CrossRef] [PubMed]

3.

W. Freude, J. Leuthold, L. Alloatti, T. Vallaitis, D. Korn, R. Palmer, C. Koos, J. Brosi, P. Dumon, R. Baets, M. L. Scimeca, I. Biaggio, B. Breiten, F. Diederich, A. Barklund, R. Dinu, and J. Wieland, “100 Gbit/s electro-optic modulator and 56 Gbit/s wavelength converter for DQPSK data in silicon-organic hybrid (SOH) technology,” Photonics Society Summer Topical Meeting Series, 2010 IEEE, (Academic, Playa del Carmen, 2010), pp 96 – 97.

4.

L. Alloatti, D. Korn, D. Hillerkuss, T. Vallaitis, J. Li, R. Bonk, R. Palmer, T. Schellinger, C. Koos, W. Freude, J. Leuthold, A. Barklund, R. Dinu, J. Wieland, M. Fournier, J. Fedeli, W. Bogaerts, P. Dumon, and R. Baets, “Silicon High-Speed Electro-Optic Modulator,” in Proceedings of Group IV Photonics, (Academic, Beijing, China, 2010), ThC2.

5.

T. Baehr-Jones, B. Penkov, J. Huang, P. Sullivan, J. Davies, J. Takayesu, J. Luo, T. D. Kim, L. Dalton, A. Jen, M. Hochberg, and A. Scherer, “Nonlinear polymer-clad silicon slot waveguide modulator with a half wave voltage of 0.25 V,” Appl. Phys. Lett. 92(16), 163303 (2008). [CrossRef]

6.

G. Wang, T. Baehr-Jones, M. Hochberg, and A. Scherer, “Design and fabrication of segmented, slotted waveguides for electro-optic modulation,” Appl. Phys. Lett. 91(14), 143109 (2007). [CrossRef]

7.

J. H. Wülbern, J. Hampe, A. Petrov, M. Eich, J. Luo, A. K.-Y. Jen, A. Di Falco, T. F. Krauss, and J. Bruns, “Electro-optic modulation in slotted resonant photonic crystal heterostructures,” Appl. Phys. Lett. 94(24), 241107 (2009). [CrossRef]

8.

C. Koos, J. Brosi, M. Waldow, W. Freude, and J. Leuthold, “Silicon-on-insulator modulators for next-generation 100 Gbit/s-Ethernet”, Proc. 33th European Conf. Opt. Commun, (Academic, Berlin, Germany, 2007), Paper P056.

9.

J. Leuthold, W. Freude, J.-M. Brosi, R. Baets, P. Dumon, I. Biaggio, M. L. Scimeca, F. Diederich, B. Frank, and C. Koos, “Silicon Organic Hybrid Technology-A Platform for Practical Nonlinear Optics,” Proc. IEEE 97(7), 1304–1316 (2009). [CrossRef]

10.

ePIXFab Technology Paper, “LETI_05 Flex process” (2010). http://www.epixfab.eu/uploads/media/LETI_05_technical_flex.pdf

11.

R. A. Soref and B. R. Bennett, “Electrooptical effects in silicon,” IEEE J. Quantum Electron. 23(1), 123–129 (1987). [CrossRef]

12.

H. F. Okorn-Schmidt, “Characterization of silicon surface preparation processes for advanced gate dielectrics,” IBM J. Res. Develop. 43(3), 351–365 (1999). [CrossRef]

13.

S. M. Sze, and K. K. Ng, Physics of Semiconductor Devices 3rd edition, (Wiley-Interscience, 2006), Chap. 3.

14.

FemSIM software, RSOFT Design Inc. http://www.rsoftdesign.com/products.php?sub=Component+Design&itm=FemSIM

15.

J. Luo, X.-H. Zhou, and A. K.-Y. Jen, “Rational molecular design and supramolecular assembly of highly efficient organic electro-optic materials,” J. Mater. Chem. 19(40), 7410–7424 (2009). [CrossRef]

16.

R. Ding, T. Baehr-Jones, Y. Liu, R. Bojko, J. Witzens, S. Huang, J. Luo, S. Benight, P. Sullivan, J.-M. Fedeli, M. Fournier, L. Dalton, A. Jen, and M. Hochberg, “Demonstration of a low V π L modulator with GHz bandwidth based on electro-optic polymer-clad silicon slot waveguides,” Opt. Express 18(15), 15618–15623 (2010). [CrossRef] [PubMed]

17.

S. Wolf, and R. N. Tauber, Silicon Processing for VLSI Era Volume 1 – Processing Technology 2nd edition, (Lattice Press, 2000), Chap. 8.

18.

H. Ma, A. K.-Y. Jen, and L. R. Dalton, “Polymer-based optical waveguides: Materials, processing, and Devices,” Adv. Mater. (Deerfield Beach Fla.) 14(19), 1339–1365 (2002). [CrossRef]

19.

MicroChem NANOTM PMMA and Copolymer datasheet. http://www.microchem.com/products/pdf/PMMA_Data_Sheet.pdf

20.

D. Taillaert, W. Bogaerts, P. Bienstman, T. F. Krauss, P. Van Daele, I. Moerman, S. Verstuyft, K. De Mesel, and R. Baets, “An out-of-plane grating coupling for efficient butt-coupling between compact planar waveguides and single-mode fibers,” IEEE J. Quantum Electron. 38(7), 949–955 (2002). [CrossRef]

21.

FullWAVE software, RSOFT Design Inc. http://www.rsoftdesign.com/products.php?sub=Component+Design&itm=FullWAVE

22.

W. H. Press, B. P. Flannery, S. A. Teukolsky, and W. T. Vetterling, Numerical Recipes in C: The Art of Scientific Computing 2nd edition, (Cambridge University Press, 1992), Chap. 15.

23.

J. Witzens, T. Baehr-Jones, and M. Hochberg, “Design of transmission line driven slot waveguide Mach-Zehnder interferometers and application to analog optical links,” Opt. Express 18(16), 16902–16928 (2010). [CrossRef] [PubMed]

OCIS Codes
(130.2790) Integrated optics : Guided waves
(130.3060) Integrated optics : Infrared
(130.3120) Integrated optics : Integrated optics devices

ToC Category:
Integrated Optics

History
Original Manuscript: July 26, 2010
Revised Manuscript: October 26, 2010
Manuscript Accepted: November 4, 2010
Published: November 16, 2010

Citation
Ran Ding, Tom Baehr-Jones, Woo-Joong Kim, Xugang Xiong, Richard Bojko, Jean-Marc Fedeli, Maryse Fournier, and Michael Hochberg, "Low-loss strip-loaded slot waveguides in 
Silicon-on-Insulator," Opt. Express 18, 25061-25067 (2010)
http://www.opticsinfobase.org/oe/abstract.cfm?URI=oe-18-24-25061


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References

  1. V. R. Almeida, Q. F. Xu, C. A. Barrios, and M. Lipson, “Guiding and confining light in void nanostructure,” Opt. Lett. 29(11), 1209–1211 (2004). [CrossRef] [PubMed]
  2. M. Hochberg, T. Baehr-Jones, G. Wang, J. Huang, P. Sullivan, L. Dalton, and A. Scherer, “Towards a millivolt optical modulator with nano-slot waveguides,” Opt. Express 15(13), 8401–8410 (2007). [CrossRef] [PubMed]
  3. W. Freude, J. Leuthold, L. Alloatti, T. Vallaitis, D. Korn, R. Palmer, C. Koos, J. Brosi, P. Dumon, R. Baets, M. L. Scimeca, I. Biaggio, B. Breiten, F. Diederich, A. Barklund, R. Dinu, and J. Wieland, “100 Gbit/s electro-optic modulator and 56 Gbit/s wavelength converter for DQPSK data in silicon-organic hybrid (SOH) technology,” Photonics Society Summer Topical Meeting Series, 2010 IEEE, (Academic, Playa del Carmen, 2010), pp 96 – 97.
  4. L. Alloatti, D. Korn, D. Hillerkuss, T. Vallaitis, J. Li, R. Bonk, R. Palmer, T. Schellinger, C. Koos, W. Freude, J. Leuthold, A. Barklund, R. Dinu, J. Wieland, M. Fournier, J. Fedeli, W. Bogaerts, P. Dumon, and R. Baets, “Silicon High-Speed Electro-Optic Modulator,” in Proceedings of Group IV Photonics, (Academic, Beijing, China, 2010), ThC2.
  5. T. Baehr-Jones, B. Penkov, J. Huang, P. Sullivan, J. Davies, J. Takayesu, J. Luo, T. D. Kim, L. Dalton, A. Jen, M. Hochberg, and A. Scherer, “Nonlinear polymer-clad silicon slot waveguide modulator with a half wave voltage of 0.25 V,” Appl. Phys. Lett. 92(16), 163303 (2008). [CrossRef]
  6. G. Wang, T. Baehr-Jones, M. Hochberg, and A. Scherer, “Design and fabrication of segmented, slotted waveguides for electro-optic modulation,” Appl. Phys. Lett. 91(14), 143109 (2007). [CrossRef]
  7. J. H. Wülbern, J. Hampe, A. Petrov, M. Eich, J. Luo, A. K.-Y. Jen, A. Di Falco, T. F. Krauss, and J. Bruns, “Electro-optic modulation in slotted resonant photonic crystal heterostructures,” Appl. Phys. Lett. 94(24), 241107 (2009). [CrossRef]
  8. C. Koos, J. Brosi, M. Waldow, W. Freude, and J. Leuthold, “Silicon-on-insulator modulators for next-generation 100 Gbit/s-Ethernet”, Proc. 33th European Conf. Opt. Commun, (Academic, Berlin, Germany, 2007), Paper P056.
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