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Optics Express

Optics Express

  • Editor: Andrew M. Weiner
  • Vol. 21, Iss. 4 — Feb. 25, 2013
  • pp: 4235–4243
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The influence of substrate on SOI photonic crystal thermo-optic devices

Weiwei Song, Manjit Chahal, George K. Celler, Yogesh Jaluria, Graham T. Reed, and Wei Jiang  »View Author Affiliations


Optics Express, Vol. 21, Issue 4, pp. 4235-4243 (2013)
http://dx.doi.org/10.1364/OE.21.004235


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Abstract

We investigate the influence of the substrate on a photonic crystal thermo-optic device on a silicon-on-insulator (SOI) platform. The substrate-induced thermo-optic tuning is obtained as a function of key physical parameters, based on a semi-analytic theory that agrees well with numeric simulations. It is shown that for some devices, the substrate’s contribution to the thermo-optic tuning can exceed 10% for a heater located in the waveguide core and much higher for some other configurations. The slow response of the substrate may also significantly slow down the overall response time of the device. Strategies of minimizing the substrate’s influence are discussed.

© 2013 OSA

1. Introduction

Silicon is an attractive material for making photonic integrated circuits due to its excellent compatibility with the well-developed CMOS technology [1

1. R. A. Soref, “The past, present, and future of silicon photonics,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1678–1687 (2006). [CrossRef]

,2

2. G. T. Reed, ed., Silicon Photonics: the State of the Art (Wiley, 2008).

]. The SOI platform provides additional benefits for the integration of photonic devices, such as low optical loss, low power consumption, high stability, and high speed [3

3. G. K. Celler and S. Cristoloveanu, “Frontiers of silicon-on-insulator,” J. Appl. Phys. 93(9), 4955–4978 (2003). [CrossRef]

]. Key components of silicon photonic circuits include optical switches, delay lines, and modulators. The thermo-optic (TO) effect is an attractive option to implement optical switches and tunable delay lines if high speed is not a requirement, because it avoids free carrier absorption of light that is present in the electro-optic devices. Furthermore, understanding of the TO effect also helps in the design of silicon electro-optic modulators because the current flow associated with carrier movement is usually accompanied by heat generation [4

4. L. Gu, W. Jiang, X. Chen, and R. T. Chen, “Physical mechanism of p-i-n diode based photonic crystal silicon electrooptic modulators for gigahertz operation,” IEEE J. Sel. Top. Quantum Electron. 14(4), 1132–1139 (2008). [CrossRef]

]. The incorporation of photonic crystal (PC) structures in these devices results in significant reduction of the interaction length due to the slow light effect [4

4. L. Gu, W. Jiang, X. Chen, and R. T. Chen, “Physical mechanism of p-i-n diode based photonic crystal silicon electrooptic modulators for gigahertz operation,” IEEE J. Sel. Top. Quantum Electron. 14(4), 1132–1139 (2008). [CrossRef]

12

12. M. Chahal, G. K. Celler, Y. Jaluria, and W. Jiang, “Thermo-optic characteristics and switching power limit of slow-light photonic crystal structures on a silicon-on-insulator platform,” Opt. Express 20(4), 4225–4231 (2012). [CrossRef] [PubMed]

]. Ultra-compact optical switches and modulators utilizing different PC structures have been widely studied recently.

A thermo-optic PC device is based on the principle that the temperature variation in the structure induces a change of its refractive index, which in turn leads to a phase shift and a time delay for an optical signal. In an SOI PC structure, the total temperature rise (and thus the total phase shift or time delay) comprises contributions from the temperature rise across the oxide layer as well as that in the substrate. In prior simulations and theoretical studies, the substrate effect is usually assumed to be small and only a relatively thin substrate layer (e.g. <20μm) is included in simulations [8

8. L. Gu, W. Jiang, X. Chen, and R. T. Chen, “Thermooptically tuned photonic crystal waveguide silicon-on-insulator Mach-Zehnder interferometers,” IEEE Photon. Technol. Lett. 19(5), 342–344 (2007). [CrossRef]

]. The effect of a full substrate (e.g. ~500μm in actual SOI wafers) has not been studied. In this work, we investigate the influence of the substrate as a function of a number of key physical parameters such as the heater length, the substrate thickness (tsub) and the thickness of the buried oxide layer (tox). Our results reveal some important aspects/scenarios in which the influence of the substrate can be surprisingly high and cannot be neglected in device design. As numerical simulation of a full substrate can be extremely time-consuming, we have developed a semi-analytic theory that can be used for quick assessment of the substrate effect in thermo-optic device design. Guided by this theory, strategies of minimizing the influence of the substrate will be discussed.

2. Substrate temperature profile

Figure 1
Fig. 1 Schematic configuration of an active Si photonic crystal waveguide structure on SOI (not drawn to scale).
shows the schematic of an active PC structure on an SOI wafer with a heat source of width W and length L embedded in the core of the photonic crystal waveguide (PCW). The heat source can be constructed from a lightly doped (e.g. ~1014cm−3) Si strip surrounded by relatively highly doped (e.g. ~1017cm−3) silicon on both sides [5

5. Y. A. Vlasov, M. O’Boyle, H. F. Hamann, and S. J. McNab, “Active control of slow light on a chip with photonic crystal waveguides,” Nature 438(7064), 65–69 (2005). [CrossRef] [PubMed]

,12

12. M. Chahal, G. K. Celler, Y. Jaluria, and W. Jiang, “Thermo-optic characteristics and switching power limit of slow-light photonic crystal structures on a silicon-on-insulator platform,” Opt. Express 20(4), 4225–4231 (2012). [CrossRef] [PubMed]

]. Concentrated ohmic heating can be produced in the center strip by passing current laterally through this structure. The top PCW layer can be modeled by an equivalent hole-free homogeneous slab with an effective thermal conductivity κeff, which is determined by the PCW structure [12

12. M. Chahal, G. K. Celler, Y. Jaluria, and W. Jiang, “Thermo-optic characteristics and switching power limit of slow-light photonic crystal structures on a silicon-on-insulator platform,” Opt. Express 20(4), 4225–4231 (2012). [CrossRef] [PubMed]

]. This method helps to significantly mitigate the simulation difficulties for such a multi-scale structure and makes it possible (albeit still very time-consuming) to simulate a structure with a full substrate thickness of 500μm. A typical 3-D steady state FEM simulation result is shown in the inset of Fig. 2(a)
Fig. 2 Temperature profile in the substrate along z-axis with the temperature at the bottom surface of the substrate as the reference, T0; for a heating power of 5mW. (a) Results for a chip with tox = 2μm, tsub = 500μm and L as a parameter; the inset shows a typical structure and steady state 3-D FEM simulation result for a simulation chip area of 800μm × 800μm with tSi = 250nm, tox = 2μm, tsub = 500μm, L = 150μm, and W = 400nm. The corresponding photonic crystal structure has a hole radius r = 0.25a, where a is the lattice constant. (b) Results for a chip with L = 100μm, tsub = 500μm and various tox; the inset shows the schematic of heat spreading in the cross section of the device.
. The bottom surface of the chip is kept at T0 = 300 K to emulate a heat sink under the substrate. Because the heat dissipation from the top and side surfaces is negligible due to the small thermal conductivity and a small heat transfer coefficient in natural convection of air, adiabatic boundary conditions are used for these surfaces [6

6. M. T. Tinker and J.-B. Lee, “Thermal and optical simulation of a photonic crystal light modulator based on the thermo-optic shift of the cut-off frequency,” Opt. Express 13(18), 7174–7188 (2005). [CrossRef] [PubMed]

,12

12. M. Chahal, G. K. Celler, Y. Jaluria, and W. Jiang, “Thermo-optic characteristics and switching power limit of slow-light photonic crystal structures on a silicon-on-insulator platform,” Opt. Express 20(4), 4225–4231 (2012). [CrossRef] [PubMed]

14

14. Y. Jaluria, Natural Convection Heat and Mass Transfer. (Pergamon Press, 1980).

]. The values of the thermal conductivities of silicon (κSi), silicon oxide (κox) and photonic crystal κeff are from Ref. [12

12. M. Chahal, G. K. Celler, Y. Jaluria, and W. Jiang, “Thermo-optic characteristics and switching power limit of slow-light photonic crystal structures on a silicon-on-insulator platform,” Opt. Express 20(4), 4225–4231 (2012). [CrossRef] [PubMed]

].

W'=(W+2Xspr+2tox)andL'=(L+2tox).
(1)

Using the above effective width and length of the heat flux at the top surface of the substrate, the temperature distribution in the substrate can be modeled separately using an electric field analogy. In electrostatics, the potential drop along the z-axis due to a finite sheet of charge uniformly distributed on the x-y plane and centered at the origin is given by [17

17. W. H. Hayt and J. A. Buck, Engineering Electromagnetics, 7th ed. (McGraw-Hill, 2006).

]
V(z)V(0)=0zρsπεarctan[(L/2)(W/2)z'(L/2)2+(W/2)2+z'2]dz'.
(2)
where ρs is the charge density, ε is the permittivity, and W and L are the width and length of the sheet. It is well known that the steady state heat conduction equation resembles the static electric field equation as both are Poisson’s equations [18

18. F. P. Incropera, D. P. Dewitt, T. L. Bergman, and A. S. Lavine, Fundamentals of Heat and Mass Transfer, 6th ed. (Wiley, 2007).

]. By the thermal-electrical analogy,it can readily be shown that for a similar heat source of width W’ and length L’, the temperature profile along the z-axis in a semi-infinite (z>0) homogeneous medium is given by
T(z)T(0)=2Q/W'L'πκ0zarctan[(L'/2)(W'/2)z'(L'/2)2+(W'/2)2+z'2]dz'.
(3)
where Q is the power of the source, and κ is the thermal conductivity of the medium. Note the z axis points downward and z = 0 is assumed to be on the top surface of the substrate. The factor 2 is due to the semi-infinite medium (the mirror image of the half space of z>0 in the other half space of z<0 that will add a source at z = 0 so that this half space problem corresponds to a full space problem with a source of 2Q). The integration in Eq. (3) has a fairly lengthy result,
{zarctan[(L'/2)(W'/2)/zμ(z)](L'/2)arccoth[μ(z)/(W'/2)](W'/2)arccoth[μ(z)/(L'/2)]}|0z,
(4)
where μ(z)(L'/2)2+(W'/2)2+z2.

The FEM simulation and semi-analytic results for the temperature profile in the substrate along the z-axis are plotted in Fig. 2(a) for three different values of heat source length. Note that the temperature of the substrate bottom surface, T(tsub) = T0, is used as the reference. In addition, simulations are performed for different values of tox, as plotted in Fig. 2(b) along with the analytic results. Evidently, the vertical temperature profiles given by semi-analytic theory agree fairly well with the FEM simulations. As could be expected, the (total) temperature rise in the substrate, ΔTsubT(0)−T(tsub), increases as L or tox decreases.

3. Fractional thermo-optic tuning due to the substrate

Estimation of the temperature rise in the substrate is important because the temperature change in the top silicon device layer is affected by the temperature rise across the buried oxide layer as well as that of the substrate (ΔTtot = ΔTox + ΔTsub). For example, in thermo-optic tunable delay lines, the total change of the delay time in the PCW (Δτtot), which is proportional to the total temperature rise in the waveguide (for small change of refractive index Δn<<1), is also affected by the temperature rise in the substrate. Assume Δτtot = μΔTtot, where μ is a constant depending on the thermo-optic coefficient of silicon. Because Δτtot = μΔTox + μΔTsub, we can define the substrate-induced delay tuning as Δτsub = μΔTsub (note that Δτsub does not mean the time delay of light in the substrate, but the delay in the waveguide due to the substrate temperature). Note that ΔTox can also be analytically expressed as [12

12. M. Chahal, G. K. Celler, Y. Jaluria, and W. Jiang, “Thermo-optic characteristics and switching power limit of slow-light photonic crystal structures on a silicon-on-insulator platform,” Opt. Express 20(4), 4225–4231 (2012). [CrossRef] [PubMed]

]
ΔTox=Qtox/(κoxL[W+2Xspr]).
(4)
To assess the substrate’s contribution in a general manner, it is more convenient to introduce a relative quantity, fractional thermo-optic tuning fsub = Δτsub/Δτtot.

Simulations are performed to estimate the fractional thermo-optic tuning due to the substrate. First, the influence of the substrate thickness is investigated. Simulations and semi-analytic calculations are carried out for three different substrate thicknesses and varying heat source lengths. As shown in Fig. 3(a)
Fig. 3 Fractional delay perturbation due to the substrate as a function of L; (a) For tox = 2μm with tsub as a parameter; (b) For tsub = 500μm with tox as a parameter.
, analytic results agree well with the FEM simulation. Their difference in fsub is less than 5%. From the plot, it is evident that as the substrate thickness increases, fsub increases as expected. In Fig. 3(b), simulation and analytic results are plotted for different buried oxide layer thicknesses. As tox increases, ΔTsub decreases (and ΔTox increases); consequently fsub decreases.

For some slow-light delay line applications in the nanosecond range or beyond, the PCW length may reach the millimeter scale or beyond, assuming group indices ng in the range of 30~100 [12

12. M. Chahal, G. K. Celler, Y. Jaluria, and W. Jiang, “Thermo-optic characteristics and switching power limit of slow-light photonic crystal structures on a silicon-on-insulator platform,” Opt. Express 20(4), 4225–4231 (2012). [CrossRef] [PubMed]

,19

19. W. Song, R. A. Integlia, and W. Jiang, “Slow light loss due to roughness in photonic crystal waveguides: an analytic approach,” Phys. Rev. B 82(23), 235306 (2010). [CrossRef]

]. For thermo-optic delay tuning, similar heater lengths are required. It can be observed in Fig. 3(b) that the value of fsub increases as the heater becomes longer. To explore its upper limit for very long heaters, fsub is calculated semi-analytically for L up to 10mm and the trend is shown in a semi-log plot in Fig. 4
Fig. 4 The trend of fractional delay perturbation: Semi-analytic results for finite L with different oxide layer thicknesses for tsub = 500μm.
.

Interestingly, as L continues increasing, fsub increases asymptotically towards a finite upper limit whose value depends on tox. This upper limit occurs because for L→∞, the structure can be treated as a two-dimensional problem in the x-z plane. For L→∞, it is necessary to define the linear power density as QDen=limLQ/L. From Eq. (3), by some calculation, the temperature rise across the substrate for L→∞ can be expressed as

ΔTsub,L=QDenπκSi[tsubW'/2arctan(W'/2tsub)+12ln(1+(tsubW'/2)2)].
(5)

Horizontal dashed lines in Fig. 4 show the upper limit of fsub calculated with Eq. (5). Evidently, they agree very well with the results from Eq. (3) at long L. In typical SOI devices, tsub is on the order of hundreds of microns and W′ is on the order of tens of microns, thus tsub>>W’. This can be used to further simplify Eq. (5) to

ΔTsub,LQDenπκSi(1+ln2tsubW+2Xspr+2tox).
(6)

Calculations show that the Eq. (6) is a good approximation for Eq. (5). The difference between them is typically very small (e.g. <1%) for tsub>3W’. Thus, Eq. (6) is useful in estimation.

4. Minimizing the substrate-induced thermo-optic effect

Although 10% contribution from the substrate might be inconsequential in some digital applications, it can be a significant issue for many analog applications. For example, for tunable optical delay lines used in phased array antennas, the beam angle is proportional to the delay difference between adjacent elements [20

20. M. Y. Chen, H. Subbaraman, and R. T. Chen, “Photonic crystal fiber beamformer for multiple X band phased-array antenna transmissions,” IEEE Photon. Technol. Lett. 20(5), 375–377 (2008). [CrossRef]

]. A 10% variation of the delay difference (which is tuned thermo-optically) will cause a 10% deviation of the beam angle, which represents a significant issue for high-resolution radars (requiring accuracy of ~0.25° for up to 60° scanning angles [21

21. E. Brookner, Practical Phased Array Antenna Systems. (Artech House, 1991), Chap. 1.

]).

Furthermore, in transient from one delay state to another state, the substrate temperature profile generally takes a very long time to reach its steady state whereas the oxide temperature profile stabilizes very fast. For precision analog applications, the slow response of the substrate may play a dominant role in determining the overall response time of the device. Consider the example shown in Fig. 5
Fig. 5 Transient temperature response to a square-wave heating power with a period of 400μs, a duty cycle of 50%. L = 150μm, tsub = 250μm, and tox = 1μm. All temperature values are normalized by the steady-state temperature ΔTtot,max. The ΔTsub trace is magnified 5 times for ease of view. For each trace, the 90% point of the rising edge is marked with a star. (10% points of the rising edges of these curves are all close to t = 0, they are not marked to avoid cluttered view).
, where the time-dependent ΔTox, ΔTsub, and ΔTtot data are extracted from a FEM simulation of the transient response of a structure. Note that ΔTox and ΔTsub defined in this work do not refer to a uniform temperature increase in the oxide and the substrate, but the temperature difference between the upper and lower surfaces of these two regions. The rise time (10% to 90%) for ΔTsub is on the order of 100μs whereas the rise time (10% to 90%) for ΔTox is on the order of 1μs. Note that the 10% point of these traces are all very close to t = 0 and their difference in time is very small. On the other hand, the time difference of the 90% points of the ΔTsub and ΔTox traces is very large; thus only the 90% points are marked. The fall time of each curve is on the same order as its respective rise time. The rise/fall time can be estimated from τ~Z2ρc/κ where ρ is the density and c the specific heat capacity of the material and Z is the heat conduction length in this material [12

12. M. Chahal, G. K. Celler, Y. Jaluria, and W. Jiang, “Thermo-optic characteristics and switching power limit of slow-light photonic crystal structures on a silicon-on-insulator platform,” Opt. Express 20(4), 4225–4231 (2012). [CrossRef] [PubMed]

]. For ΔTox, the pertinent material is the oxide, Z is the thickness of the buried oxide layer. For ΔTsub, the pertinent material is silicon, Z is on the order of the substrate thickness. Silicon and SiO2 have comparable ρc; and κSi is about two orders of magnitude higher than κox. The substrate thickness is usually two orders larger than the buried oxide thickness. Based on these values, the transient response of the substrate is expected to be roughly two orders of magnitude slower than the buried oxide layer. Assume an analog application requires 1% delay tuning accuracy. Then the device analyzed in Fig. 5 is considered stable only after ΔTsub reach ~90% of its steady-state value (so that ΔTtot reaches 99% of its steady-state value because this device has ΔTsub~0.09ΔTtot in the steady-state). Therefore, for this analog application, the device response time is practically ~100 μs. This is much longer than the intrinsic response time of the oxide layer.

According to the above discussions, it would be desirable to minimize the influence of the substrate in order to speed up the device response and improve the device stability/precision for many analog applications. To this end, it would be useful to analyze how the upper limit of fsub (L→∞) varies with key physical parameters. Results are plotted in Fig. 6
Fig. 6 Trend for fsub(L→∞) with tox as the variable for different substrate thicknesses. The inset shows the influence of the hole radius (with tox = 2μm).
for different substrate thicknesses and oxide thicknesses. It can be seen that the influence of the substrate can be reduced by increasing the thickness of the buried oxide layer. This reduction can be attributed to two trends: ΔTox increases as tox1/2 and ΔTsub decreases with tox due to the term ln[2tsub/(W + 2Xspr + 2tox)] in Eq. (6) [12

12. M. Chahal, G. K. Celler, Y. Jaluria, and W. Jiang, “Thermo-optic characteristics and switching power limit of slow-light photonic crystal structures on a silicon-on-insulator platform,” Opt. Express 20(4), 4225–4231 (2012). [CrossRef] [PubMed]

]. When the oxide layer is thicker than 5μm, fsub is less than 5% for all cases shown in Fig. 6. Furthermore, reducing the substrate thickness can also reduce ΔTsub according to Eq. (5). It can be readily shown that fsub varies faster than tox-1/2 with respect to the oxide thickness and varies logarithmically with tsub. Thus, mathematically, fsub can be more effectively reduced by increasing tox.

However, in practice, thicker oxide layers are less preferable for a number of reasons. First, it would be challenging and costly to achieve tox >5μm in making high-quality SOI wafers. Second, by increasing tox, the heat conductance between source and sink becomes smaller, which hampers device heat dissipation. Third, thicker oxide will lead to an increase of response time [12

12. M. Chahal, G. K. Celler, Y. Jaluria, and W. Jiang, “Thermo-optic characteristics and switching power limit of slow-light photonic crystal structures on a silicon-on-insulator platform,” Opt. Express 20(4), 4225–4231 (2012). [CrossRef] [PubMed]

], which is not desirable for many active devices. On the other hand, a thinner substrate will provide better heat conductance and thus reduce the response time. Moreover, with the recent advance of membrane technology [22

22. J. A. Rogers, M. G. Lagally, and R. G. Nuzzo, “Synthesis assembly and applications of semiconductor nanomembranes,” Nature 477(7362), 45–53 (2011). [CrossRef] [PubMed]

,23

23. S. Huang, J. Luo, H. L. Yip, A. Ayazi, X. H. Zhou, M. Gould, A. Chen, T. Baehr-Jones, M. Hochberg, and A. K. Y. Jen, “Efficient poling of electro-optic polymers in thin films and silicon slot waveguides by detachable pyroelectric crystals,” Adv. Mater. (Deerfield Beach Fla.) 24(10), OP42–OP47 (2012). [CrossRef] [PubMed]

], the substrate can be easily reduced to less than 10μm . Thus membrane based devices could help to reduce the substrate-induced thermo-optic tuning.

It should be noted that the structure shown in Fig. 1 is optimal. If the heater is located on a lateral edge of the PCW (e.g. heater located at xheater = 7μm, and the PCW core located at xcore = 0), then the temperature rise in the PCW core ΔTcore could be 2~3 times smaller than the ΔTtot at the heater due to the exponential temperature drop along x [12

12. M. Chahal, G. K. Celler, Y. Jaluria, and W. Jiang, “Thermo-optic characteristics and switching power limit of slow-light photonic crystal structures on a silicon-on-insulator platform,” Opt. Express 20(4), 4225–4231 (2012). [CrossRef] [PubMed]

]. This can affect fsub in the PCW core. To analyze such a case, we need to consider the total temperature rise in the top Si layer ΔTtot, the vertical temperature difference between top and bottom surfaces of the substrate ΔTsub, and the vertical temperature difference in oxide ΔTox in two different vertical planes at x = xheater and x = xcore, respectively. Obviously, the temperature rise in the core is just ΔTtot in the plane at x = xcore, ΔTcore≡ΔTtot(xcore). The actual delay tuning is determined by ΔTcore. Because ΔTcore is much lower than ΔTtot(xheater), the fractional thermal tuning in the PCW core due to the substrate in this case fsub(xcore) = ΔTsub(xcore)/ΔTcore could be much larger than ΔTsub(xheater)/ΔTtot(xheater) given in preceding sections. In the worst case, fsub(xcore) may exceed 20% in a non-optimal structure.

It would be interesting to extend this theory to study the substrate-induced effect in other device geometries including air-bridge PCWs or non-photonic crystal structures. For some photonic structures, the ratio of the device dimension along y-axis over that along x-axis is not as large as in PCWs. It can be expected that the substrate-induced effect in such structures will resemble short PCWs, which suggests fsub is typically a smaller value according to Fig. 4. It may also be interesting to extend this work to integrated circuits on a SOI wafer. Because the transistors generally have smaller dimensions along x and y axis, it is expected that the substrate temperature rise due to a single transistor is fairly small. For a complicated circuit including many transistors and metal interconnects in multilayer 3D configurations, it remains a challenging problem to investigate the substrate-induced thermal issues. Detailed discussion of these further research topics is beyond the scope of this work.

5. Conclusion

In conclusion, the influence of the substrate on SOI thermo-optic photonic crystal devices is studied in terms of key physical parameters. The temperature rise in the substrate is calculated semi-analytically. The accuracy of the semi-analytic results is verified by the FEM simulations. The upper limit of the fractional delay tuning due to the substrate is obtained as a function of key physical parameters. For long delay lines, the substrate-induced fractional delay tuning could exceed 10% for heaters in the PCW core and exceed 20% for heaters at the PCW lateral edge. The slow response of the substrate may cause the device to take a long time to stabilize, which may significantly elongate the de facto response time of the device (by 10~100 fold). This could explain slow response observed in some non-optimal device structures and help guide further device optimization. Scaling of the substrate’s influence with key structure parameters is analyzed. Strategies of minimizing the influence of the substrate are discussed.

Acknowledgments

This work is supported in part by AFOSR under Grant No. FA9550-08-1-0394 (G. Pomrenke) and by DARPA Young Faculty Award under Grant No. N66001-12-1-4246. M.C. is supported in part by a Rutgers ECE Graduate Fellowship. The authors are grateful to Prof. S. R. McAfee for helpful discussions.

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3.

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4.

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5.

Y. A. Vlasov, M. O’Boyle, H. F. Hamann, and S. J. McNab, “Active control of slow light on a chip with photonic crystal waveguides,” Nature 438(7064), 65–69 (2005). [CrossRef] [PubMed]

6.

M. T. Tinker and J.-B. Lee, “Thermal and optical simulation of a photonic crystal light modulator based on the thermo-optic shift of the cut-off frequency,” Opt. Express 13(18), 7174–7188 (2005). [CrossRef] [PubMed]

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19.

W. Song, R. A. Integlia, and W. Jiang, “Slow light loss due to roughness in photonic crystal waveguides: an analytic approach,” Phys. Rev. B 82(23), 235306 (2010). [CrossRef]

20.

M. Y. Chen, H. Subbaraman, and R. T. Chen, “Photonic crystal fiber beamformer for multiple X band phased-array antenna transmissions,” IEEE Photon. Technol. Lett. 20(5), 375–377 (2008). [CrossRef]

21.

E. Brookner, Practical Phased Array Antenna Systems. (Artech House, 1991), Chap. 1.

22.

J. A. Rogers, M. G. Lagally, and R. G. Nuzzo, “Synthesis assembly and applications of semiconductor nanomembranes,” Nature 477(7362), 45–53 (2011). [CrossRef] [PubMed]

23.

S. Huang, J. Luo, H. L. Yip, A. Ayazi, X. H. Zhou, M. Gould, A. Chen, T. Baehr-Jones, M. Hochberg, and A. K. Y. Jen, “Efficient poling of electro-optic polymers in thin films and silicon slot waveguides by detachable pyroelectric crystals,” Adv. Mater. (Deerfield Beach Fla.) 24(10), OP42–OP47 (2012). [CrossRef] [PubMed]

OCIS Codes
(120.6810) Instrumentation, measurement, and metrology : Thermal effects
(350.4238) Other areas of optics : Nanophotonics and photonic crystals
(130.4815) Integrated optics : Optical switching devices
(130.5296) Integrated optics : Photonic crystal waveguides

ToC Category:
Photonic Crystals

History
Original Manuscript: November 9, 2012
Revised Manuscript: December 17, 2012
Manuscript Accepted: December 19, 2012
Published: February 12, 2013

Citation
Weiwei Song, Manjit Chahal, George K. Celler, Yogesh Jaluria, Graham T. Reed, and Wei Jiang, "The influence of substrate on SOI photonic crystal thermo-optic devices," Opt. Express 21, 4235-4243 (2013)
http://www.opticsinfobase.org/oe/abstract.cfm?URI=oe-21-4-4235


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References

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  23. S. Huang, J. Luo, H. L. Yip, A. Ayazi, X. H. Zhou, M. Gould, A. Chen, T. Baehr-Jones, M. Hochberg, and A. K. Y. Jen, “Efficient poling of electro-optic polymers in thin films and silicon slot waveguides by detachable pyroelectric crystals,” Adv. Mater. (Deerfield Beach Fla.)24(10), OP42–OP47 (2012). [CrossRef] [PubMed]

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