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Optics Letters

Optics Letters


  • Vol. 12, Iss. 11 — Nov. 1, 1987
  • pp: 956–958

Architectural and performance considerations for a 107-instruction/sec optoelectronic central processing unit

R. Arrathoon and S. Kozaitis  »View Author Affiliations

Optics Letters, Vol. 12, Issue 11, pp. 956-958 (1987)

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Architectural considerations for a multiple-instruction, single-data-based optoelectronic central processing unit operating at 107 instructions per second are detailed. Central to the operation of this device is a giant fiber-optic content-addressable memory in a programmable logic array configuration. The design includes four instructions and emphasizes the fan-in and fan-out capabilities of optical systems. Interconnection limitations and scaling issues are examined.

© 1987 Optical Society of America

Original Manuscript: March 10, 1987
Manuscript Accepted: August 7, 1987
Published: November 1, 1987

R. Arrathoon and S. Kozaitis, "Architectural and performance considerations for a 107-instruction/sec optoelectronic central processing unit," Opt. Lett. 12, 956-958 (1987)

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  1. R. Arrathoon, S. Kozaitis, Proc. Soc. Photo-Opt. Instrum. Eng. 752, 34 (1987).
  2. C. E. Strangio, Digital Electronics (Prentice-Hall, Englewood Cliffs, N.J., 1980), p. 456.
  3. T. K. Gaylord, M. M. Mirsalehi, C. C. Guest, Opt. Eng. 24, 48 (1985).
  4. R. Arrathoon, S. Kozaitis, Opt. Eng. 25, 29 (1986).
  5. Y. Ichioka, J. Tanida, Proc. IEEE 72, 787 (1984). [CrossRef]
  6. R. Arrathoon, E. R. Schroeder, F. Westervelt, Proc. Soc. Photo-Opt. Instrum. Eng. 578, 207 (1985).
  7. P. S. Guilfoyle, W. J. Wiley, Proc. Soc. Photo-Opt. Instrum. Eng. 639, 102 (1986).
  8. M. M. Mano, Digital Logic and Computer Design (Prentice-Hall, Englewood Cliffs, N.J., 1979), p. 40.
  9. R. Arrathoon, Proc. Soc. Photo-Opt. Instrum. Eng. 752, 2 (1987).
  10. R. Arrathoon, M. H. Hassoun, Proc. Soc. Photo-Opt. Instrum. Eng. 752, 143 (1987).

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